Semiconductor integrated circuit device

A semiconductor integrated circuit device comprising:

• a circuit operating at a first power supply voltage;
• an output circuit operating at a second power supply voltage higher than said first power supply voltage;
• an output circuit operating at a third power supply voltage higher than said second power supply voltage;
• and an output circuit operating at a fourth power supply voltage which is intermediate between said second power supply voltage and said third power supply voltage,
• wherein said semiconductor integrated circuit device further comprises:
• a conversion circuit,
• at the time of signal transmission from said circuit operating at the first power supply voltage to said output circuit operating at the third power supply voltage, said conversion circuit converts a signal amplitude from said first power supply voltage to said third power supply voltage and then outputs it,
• at the time of signal transmission from said circuit operating at the first power supply voltage to said output circuit operating at the second power supply voltage, said conversion circuit converts a signal amplitude from a signal amplitude of said first power supply voltage to a signal amplitude of said third power supply voltage, then converts it to a signal amplitude of said second power supply voltage, and then outputs it, and
• at the time of signal transmission from said circuit operating at the first power supply voltage to said output circuit operating at the fourth power supply voltage, said conversion circuit converts a signal amplitude from a signal amplitude of said first power supply voltage to a signal amplitude of said third power supply voltage, and then performs conversion to a signal having an amplitude of said fourth power supply voltage.

A semiconductor integrated circuit device comprising:

• a circuit operating at a first power supply voltage;
• and a plurality of output circuits operating at power supply voltages higher than said first power supply voltage,
• wherein the lowest voltage of the power supply voltages of said output circuits is a second power supply voltage, and the highest voltage of the power supply voltages of said output circuits is a third power supply voltage,
• said semiconductor integrated circuit device further comprises:
• a conversion circuit,
• at the time of signal transmission from said circuit operating at the first power supply voltage to said output circuit operating at the third power supply voltage, said conversion circuit amplifies a signal amplitude from said first power supply voltage directly to said third power supply voltage, and
• at the time of signal transmission to an output circuit operating at a power supply voltage lower than said third power supply voltage, said conversion circuit converts a signal amplitude from said first power supply voltage to said third power supply voltage and then converts it to a voltage amplitude lower than said third power supply voltage.

A semiconductor integrated circuit device comprising:

• a circuit supplied with a first operating potential;
• a first input/output circuitry supplied with a second operating potential higher than said first operating potential;
• a second input/output circuitry supplied with a third operating potential higher than said second operating potential;
• and
• a third input/output circuitry supplied with a fourth operating potential higher than said second operating potential and lower than said third operating potential,
• wherein said first and third input/output circuitries include a first transistor having a gate oxide film with a first film thickness and a second transistor having a gate oxide film with a film thickness larger than said first film thickness,
• a withstand voltage of said first transistor is said first operating potential,
• a withstand voltage of said second transistor is said fourth operating potential,
• at the time of signal transmission from said circuit to said first input/output circuitry, a signal amplitude of said first operating potential is converted to a signal amplitude of said fourth operating potential, then converted to a signal amplitude of said second operating potential, and then outputted,
• at the time of signal transmission from said circuit to said third input/output circuitry, the signal amplitude of said first operating potential is converted to the signal amplitude of said fourth operating potential, and then outputted, and
• said second input/output circuitry is a circuit which receives said first, third, and fourth operating potentials, converts the signal amplitude of said first operating potential to a signal amplitude of said third operating potential, and then outputs it, and a withstand voltage mitigation circuit for avoiding an application of said third operating potential between a gate electrode and source and drain electrodes of said second transistor forming said second input/output circuitry is provided.

A semiconductor integrated circuit device comprising:

• an inverter circuit receiving an input signal;
• a first N type transistor having a gate which receives said input signal;
• a first P type transistor having a gate which receives said input signal and a drain which is connected to a drain of said first N type transistor;
• a second N type transistor having a gate which receives said input signal and a source which is connected to a drain of said first P type transistor;
• a second P type transistor having a gate which receives said input signal and a drain which is connected to a drain of said second N type transistor;
• a third N type transistor having a gate which receives an output signal of said inverter;
• a third P type transistor having a gate which receives said output signal and a drain which is connected to said third N type transistor;
• a fourth N type transistor having a gate which receives said output signal and a source which is connected to a drain of said third P type transistor;
• a fourth P type transistor having a gate which receives said output signal and a drain which is connected to a source of said fourth N type transistor;
• a fifth P type transistor having a gate which is connected to the drain of said second N type transistor and a drain which is connected to a source of said fourth P type transistor;
• a sixth P type transistor having a gate which is connected to a drain of said fourth N type transistor and a drain which is connected to a source of said second P type transistor;
• a fifth N type transistor having a gate which is connected to a gate of said fifth P type transistor and a source which is connected to the source of said fourth N type transistor;
• and
• a sixth N type transistor having a gate which is connected to a gate of said sixth P type transistor and a source which is connected to a source of said second N type transistor,
• wherein a transistor forming said inverter circuit, said first and third N type transistors, and said first and third P type transistors have a gate insulating film with a first thickness,
• said second, fourth, fifth, and sixth N type transistors and said second, fourth, fifth, and sixth P type transistors have a gate insulating film with a second thickness larger than said first thickness,
• threshold voltages of said second and fourth P type transistors are lower than threshold voltages of said fifth and sixth P type transistors, and
• threshold voltages of said second and fourth N type transistors are lower than the threshold voltages of said fifth and sixth P type transistors.

A semiconductor integrated circuit device comprising:

• a circuit operating at a first operating voltage;
• and
• an input circuit operating at a second operating voltage higher than said first operating voltage,
• wherein said input circuit receives an input of a signal with an amplitude higher than said first operating voltage and lower than said second operating voltage and converts said inputted signal to an amplitude of said second operating voltage, and then converts it to an amplitude of said first operating voltage and inputs it to said circuit.