Rigid wave pattern design on chip carrier substrate and printed circuit board for semiconductor and electronic sub-system packaging
AssigneeSanDisk Corporation
InventorsChin-Tien Chiu, Chih-Chin Liao, Ken Wang, Han-Shiao Chen, Cheemen Yu, Hem Takiar
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Abstract
A rigid wave pattern formed on a first side of a substrate in a semiconductor die package. The rigid wave pattern aligns with and overlies the contact fingers formed on the second side of the substrate. When the substrate and dice are encased during the molding process, the rigid wave pattern effectively reduces deformation of and stresses on the dice, therefore substantially alleviating die cracking.
Claims28
A first pattern formed in a first surface of a substrate, the substrate capable of supporting and electrically connecting to a semiconductor dice, a second surface of the substrate opposite the first surface including a second pattern, the first pattern comprising:
- an etched portion;
- and
- an unetched portion surrounding the etched portion, the first pattern capable of reducing a mechanical stress generated by the second pattern on the semiconductor dice during a molding process.
A rigid wave pattern formed on a first surface of a substrate, the substrate capable of supporting and electrically connecting to a semiconductor dice, a second surface of the substrate opposite the first surface including one or more contact fingers for making one or more external electrical connections, the rigid wave pattern comprising:
- one or more etched portions on the first surface, an etched portion of the one or more etched portions overlying a contact finger of the one or more contact fingers on the second surface;
- and
- an unetched portion surrounding the one or more etched portions, the rigid wave pattern capable of reducing a mechanical stress generated by the contact finger on the semiconductor dice during a molding process.
A semiconductor die package, comprising:
- a semiconductor dice;
- a substrate capable of supporting and electrically connecting to the semiconductor dice, the substrate including a first pattern formed in a first surface of the substrate and the substrate including a second pattern formed in a second surface of the substrate opposite the first surface, the first pattern including:
- an etched portion, and
- an unetched portion surrounding the etched portion, the second pattern capable of reducing a mechanical stress generated by the second pattern on the semiconductor dice during a molding process;
- and
- a molding compound for encapsulating the semiconductor dice and the substrate.
A method for reducing an occurrence of die cracking in a semiconductor dice mounted on a substrate having first and second surfaces, the method comprising the step of:
- (a) etching a pattern in the first surface of the substrate opposite to a portion of a conductance pattern in the second surface of the substrate, the pattern in the first surface reducing mechanical stresses exerted on the semiconductor dice by the portion of the conductance pattern.
Dependencies are inferred from the claim text.