Hybrid crystal orientation CMOS structure for adaptive well biasing and for power and performance enhancement

A semiconductor structure comprising:

• a substrate comprising an SOI region and a bulk-Si region, wherein said SOI region and said bulk-Si region have a same crystallographic orientation;
• an isolation region separating said SOI region from said bulk-Si region;
• at least one first device located in said SOI region and at least one second device located in said bulk-Si region;
• and
• a well region underlying said at least one second device and a contact to said well region, wherein said contact stabilizes floating body effects and provides a means for adjusting threshold voltages in field effect transistors (FETs) in the bulk-Si region through application of a bias voltage.

A method of forming a semiconducting structure comprising:

• providing a substrate comprising at least a first semiconductor layer and a second semiconductor layer separated by an insulating layer, said first semiconductor layer and said second semiconducting layer having a same or differing crystalline orientation;
• protecting a portion of the substrate to define an SOI region, while leaving another portion of the substrate unprotected, said unprotected portion of the substrate defining a bulk-Si region;
• etching said unprotected portion of the substrate to expose a surface of the second semiconductor layer;
• regrowing a semiconductor material on said exposed surface of the second semiconductor layer, said semiconductor material having said same crystalline orientation;
• planarizing the substrate containing the semiconductor material so that an upper surface of the first semiconductor layer is substantially planar with an upper surface of the semiconductor material;
• and
• forming at least one first device in said SOI region, while forming at least one second device on said semiconductor material in said bulk-Si region, wherein said forming at least one second devoce in said bulk-Si region includes implanting said bulk-Si region with a first dopant to provide a well region, forming at least one gate region atop a surface of said bulk-Si region, forming source and drain regions adjacent said at least one gate region with a second type dopant, and forming a contact to said well region, wherein said contact stabilizes floating body effects.