Field effect transistor and method of manufacturing the same
AssigneeNichia Corporation
InventorsShiro Akamatsu, Yuji Ohmaki
Life of this patent
Estimating the term…
Loading patent…
AssigneeNichia Corporation
InventorsShiro Akamatsu, Yuji Ohmaki
Estimating the term…
An FET includes a first semiconductor layer and a second semiconductor layer, the second semiconductor layer being formed on the first semiconductor layer and having a band gap energy greater than that of the first semiconductor layer. The first and second semiconductor layers are made of a Group III-V compound semiconductor layer, formed on the first semiconductor layer are a gate electrode 36 and a source electrode 35, formed on the second semiconductor layer is a drain electrode 37, and the drain electrode and the gate electrode are formed respectively on opposing planes of a semiconductor structure which contains the first and second semiconductor layers. This arrangement enables a drain's breakdown voltage to be increased in the FET, because the gate electrode 36 and the drain electrode 37 are respectively disposed, in a spatial separation of each other, on different planes instead of the same plane of the semiconductor structure.
A field effect transistor comprising:
A field effect transistor comprising:
Dependencies are inferred from the claim text.