Multi-point correlated sampling for image sensors
AssigneeMicron Technology, Inc.
InventorChristian Boemler
Life of this patent
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Abstract
An improved passive pixel sensor (PPS) circuit comprising a correlated sampling circuit and method that integrates pixel charge leakage onto an integrating amplifier during sampling periods. An integrator circuit is provided for integrating PPS pixel charges received via a column line, and correlated sampling circuit is provided for the removal of kTC noise and dark integration. A multi-point sampling of the output of the integrator is provided wherein at least a first and second correlated sample are used to detect the charge integration from the column line leakages, and at least a third sample is used to detect the PPS signal after pixel readout. The correlated sampling method is employed to remove kTC noise and dark integration from the PPS signal.
Claims44
An image sensor comprising:
- an array of passive pixel sensors;
- an integrator circuit for receiving charge collected by one or more passive pixel sensors of said array, and for receiving a reset voltage, and for generating corresponding integrator circuit output signals;
- and
- a correlated sampling circuit for respectively sampling and holding at least two reset signals, and a pixel output signal VSIG corresponding to an output of a pixel sensor and for producing output signals corresponding to (i) the differential between two of the at least two reset signals, and (ii) the differential between one of the at least two reset signals and the pixel output signal.
A method of operating an image sensor comprising:
- generating a reset signal on a column line;
- integrating the reset signal;
- storing at least two sampled reset signals corresponding to the integrated reset signal at respective points in time;
- generating a reset differential voltage signal corresponding to the differential between two of said at least two sampled reset signals;
- coupling a passive pixel sensor to the column line;
- integrating the pixel voltage on the column line;
- and
- storing a pixel signal corresponding to the integrated pixel voltage;
- and
- generating a pixel differential voltage signal corresponding to the differential between the pixel signal, and one of said at least two sampled reset signals.
A method of operating an image sensor comprising:
- generating a reset signal on a column line;
- integrating the reset signal;
- storing a first sampled reset signal corresponding to the integrated reset signal at a first point in time;
- storing a second sampled reset signal corresponding to the integrated reset signal at a second point in time;
- generating a reset differential signal corresponding to the differential between the first sampled reset signal and the second sampled reset signal;
- collecting incoming charge at a passive pixel sensor;
- coupling the passive pixel sensor to the column line;
- integrating a pixel signal corresponding to said collected incoming charge onto the column line;
- storing the pixel signal;
- generating a pixel differential signal corresponding to the differential between the second sampled reset signal and the pixel signal.
A method of fabricating an imager comprising:
- forming on an integrated circuit chip a pixel array comprising passive pixel cells and readout circuitry;
- forming on the integrated circuit chip an integrator circuit, and correlated sampling circuit for sampling and holding at least two reset signals and a pixel charge signal VSIG to produce an adjusted pixel signal;
- and
- forming connections for transmitting analog signals from the pixel array to the integrator circuit, and from the integrator circuit to the correlated sampling circuit.
A method of operating an image sensor comprising:
- resetting a signal line which receives an output signal from a passive pixel sensor;
- sampling and holding signals from said reset signal line at spaced points in time to produce at least two sampled and held reset signals;
- coupling a pixel output signal from the passive pixel sensor to said signal line;
- sampling and holding said pixel output signal;
- and
- producing a correlated output signal based on a combination of said at least two sampled and held reset signals and said sampled and held pixel output signal.
An image sensor comprising:
- an array of pixel sensors;
- an integrator circuit for receiving charge collected by one or more pixel sensors of said array, and for receiving a reset voltage, and for generating corresponding integrator circuit output signals;
- and
- a correlated sampling circuit for respectively sampling and holding at least two reset signals, and a pixel output signal VSIG corresponding to an output of a pixel sensor and for producing output signals corresponding to (i) the differential between two of the at least two reset signals, and (ii) the differential between one of the at least two reset signals and the pixel output signal.
A method of operating an image sensor comprising:
- generating a reset signal on a column line;
- integrating the reset signal;
- storing at least two sampled reset signals corresponding to the integrated reset signal at respective points in time;
- generating a reset differential voltage signal corresponding to the differential between two of said at least two sampled reset signals;
- transferring a pixel voltage to the column line;
- and
- storing a pixel signal corresponding to the transferred pixel voltage;
- and
- generating a pixel differential voltage signal corresponding to the differential between the pixel signal, and one of said at least two sampled reset signals.
A method of fabricating an imager comprising:
- forming on an integrated circuit chip a pixel array comprising pixel cells and readout circuitry;
- forming on the integrated circuit chip an integrator circuit, and correlated sampling circuit for sampling and holding at least two reset signals and a pixel charge signal VSIG to produce an adjusted pixel signal;
- and
- forming connections for transmitting analog signals from the pixel array to the integrator circuit, and from the integrator circuit to the correlated sampling circuit.
Dependencies are inferred from the claim text.