Method and apparatus employing dynamic element matching for reduction of column-wise fixed pattern noise in a solid state imaging sensor
AssigneeMicron Technology, Inc.
InventorHai Yan
Life of this patent
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Abstract
An imager having a switching circuit that couples pixel columns to different sample and hold circuits to reduce the noticeability of column-wise fixed pattern noise. A controller randomly couples a pixel column to a sample and hold circuit, therefore fixed pattern noise emanating from a particular sample and hold circuit is not always associated with a single pixel column. Therefore the visual perception of fixed pattern noise associated with a particular sample and hold circuit is reduced.
Claims74
A readout circuit for an imaging device, comprising:
- a switching circuit adapted to selectively couple each of a plurality of columns of a pixel array to one of a plurality of sample-and-hold circuits.
A method of reading signals from an imaging device, comprising:
- selectively coupling through a switching circuit each of a plurality of columns of a pixel array to one of a plurality of sample-and-hold circuits.
A method of forming a pixel array, comprising the steps of:
- forming a pixel array having a plurality of columns over a substrate;
- forming a plurality of sample and hold circuits over said substrate;
- and
- forming a switching circuit over said substrate for switchingly coupling one of said plurality of columns of pixels in said pixel array to one of said sample and hold circuits.
An integrated circuit, comprising:
- a pixel array;
- a readout circuit coupled to said pixel array, comprising:
- a switching circuit adapted to selectively couple each of a plurality of columns of said pixel array to one of a plurality of sample-and-hold circuits.
An imager device, comprising:
- a pixel array;
- a readout circuit coupled to said pixel array, comprising:
- a switching circuit adapted to selectively couple each of a plurality of columns of said pixel array to one of a plurality of sample-and-hold circuits.
A processor system, comprising:
- a processor;
- and
- imager device, comprising:
- a pixel array;
- a readout circuit coupled to said pixel array, comprising:
- a switching circuit adapted to selectively couple each of a plurality of columns of said pixel array to one of a plurality of sample-and-hold circuits.
Dependencies are inferred from the claim text.