Providing extended memory protection
AssigneeIntel Corporation
InventorsAntonio Cheng, Francis McKeen
Life of this patent
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Abstract
In one embodiment, the present invention provides for extended memory protection for memory of a system. The embodiment includes a method for associating a protection indicator of a protection record maintained outside of an application's data space with a memory location, and preventing access to the memory location based on the status of the protection indicator. In such manner, more secure operation is provided, as malicious code or other malware is prevented from accessing protected memory locations. Other embodiments are described and claimed.
Claims30
A method comprising:
- associating a protection indicator of a protection record with a memory location, the protection record inaccessible via a virtual address space;
- and
- preventing access to the memory location based on the status of the protection indicator.
An apparatus comprising:
- a first memory to store copies of protection vectors, wherein the protection vectors identify a protection status of a portion of a second memory;
- and
- a first buffer coupled to the first memory, the first buffer to store translations between a virtual address and a corresponding physical address, the first buffer to generate a hit signal and a miss signal.
An article comprising a machine-readable storage medium that stores data representing an integrated circuit comprising:
- a first cache to cache protection records wherein each of the protection records is to identify a protection status of a portion of a system memory;
- and
- a translation lookaside buffer coupled to the first cache, the translation lookaside buffer to store translations between a virtual address and a corresponding physical address for the protection records.
A system comprising:
- a first memory to store copies of protection vectors, wherein the protection vectors identify a protection status of a portion of an addressable memory;
- a first buffer coupled to the first memory, the first buffer to store translations between a virtual address and a corresponding physical address;
- and
- a dynamic random access memory coupled to the first memory and the first buffer.
Dependencies are inferred from the claim text.