Selecting subroutine return mechanisms
AssigneeArm Limited
InventorsRichard Grisenthwaite, Paul Kimelman, David Seal
Life of this patent
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Abstract
Following execution of a subroutine, a return instruction is executed having an address as an input operand thereto. This input operand is compared with one or more predetermined values to detect a match and the return instruction response is selected in dependence upon whether or not a match is detected. Thus, the return address value can be used to invoke differing return instruction responses, such as an exception return response or a procedure return response. The one or more predetermined addresses may be conveniently allocated to the highest memory addresses within the memory map.
Claims11
Apparatus for performing data processing operations specified by program instructions, said apparatus comprising:
- return logic responsive to a return instruction having an address as an input operand to trigger a return to execution of a program instruction indicated by said address;
- wherein
- (i) if said address has a value not matching one or more predetermined address values, then said return logic triggers a first return response comprising one or more first return response operations to yield a first returned state;
- and
- (ii) if said address has a value matching said one or more predetermined address values, then said return logic triggers a second return instruction response comprising one or more second return response operations to yield a second returned state, said one or more second return instruction response operations differing from said one or more first return instruction response operations.
A method of performing data processing operations specified by program instructions, said method comprising the steps of:
- in response to a return instruction having an address as an input operand, triggering a return to execution of a program instruction indicated by said address;
- wherein
- (i) if said address has a value not matching one or more predetermined address values, then a first return response is triggered comprising one or more first return response operations to yield a first returned state;
- and
- (ii) if said address has a value matching said one or more predetermined address values, then a second return instruction response is triggered comprising one or more second return response operations to yield a second returned state, said one or more second return instruction response operations differing from said one or more first return instruction response operations.
Dependencies are inferred from the claim text.