Preparing instruction groups for a processor having multiple issue ports

A method of preparing an instruction group of target instructions for dispersal through a plurality of issue ports to functional units of a target processor, from subject instructions executable by a subject processor, the method comprising the steps of:

• generating a block of target instructions from the subject instructions;
• placing a set of the target instructions into a plurality of pools, each pool being associated with a subset of the issue ports in an overlapping hierarchical structure having superior narrower pools associated with fewer instruction ports than subsidiary wider pools, and reducing availability in a subsidiary wider pool in response to each placing of one of the set of target instructions into a superior narrower pool in the hierarchical structure;
• and
• forming an instruction group from the placed set of target instructions.

A computer-readable storage medium having software resident thereon in the form of computer-readable code executable by a computer to perform a method of preparing an instruction group of target instructions for dispersal through a plurality of issue ports to functional units of a target processor, from subject instructions executable by a subject processor, the method comprising the steps of:

• providing a plurality of pools, each pool being associated with one or more of the issue ports and including at least a first pool and a second pool having at least one issue port in common;
• placing instructions into the pools according to instruction type, wherein placing an instruction into the first pool also reduces occupancy of the second pool;
• and
• creating an instruction group from the placed instructions.

In combination:

• a target processor having a plurality of functional units and a plurality of issue ports for dispersal of an instruction to the plurality of functional units;
• and
• translator code to perform program code conversion of a subject program into target code executable by the target processor, including performing the steps of:
• providing a plurality of pools, each pool being associated with one or more of the issue ports of the target processor and including at least a first pool and a second pool having at least one issue port in common;
• placing instructions into the pools according to instruction type, wherein placing an instruction into the first pool also reduces occupancy of the second pool;
• and
• creating an instruction group from the placed instructions.

A computer-readable storage medium having software resident thereon in the form of computer-readable code executable by a computer to perform a method of preparing an instruction group of target instructions for dispersal through a plurality of issue ports to functional units of a target processor, from subject instructions executable by a subject processor, the method comprising the steps of:

• generating a block of target instructions from the subject instructions;
• placing a set of the target instructions into a plurality of pools, each pool being associated with a subset of the issue ports in an overlapping hierarchical structure having superior narrower pools associated with fewer instruction ports than subsidiary wider pools, and reducing availability in a subsidiary wider pool in response to each placing of one of the set of target instructions into a superior narrower pool in the hierarchical structure;
• and
• forming an instruction group from the placed set of target instructions.

In combination:

• a target processor having a plurality of functional units and a plurality of issue ports for dispersal of an instruction to the plurality of functional units;
• and
• translator code to perform program code conversion of a subject program into target code executable by the target processor, including performing the steps of:
• generating a block of target instructions from the subject instructions;
• placing a set of the target instructions into a plurality of pools, each pool being associated with a subset of the issue ports in an overlapping hierarchical structure having superior narrower pools associated with fewer instruction ports than subsidiary wider pools, and reducing availability in a subsidiary wider pool in response to each placing of one of the set of target instructions into a superior narrower pool in the hierarchical structure;
• and
• forming an instruction group from the placed set of target instructions.