Direct memory access for advanced high speed bus
AssigneeSTMicroelectronics Belgium NV
InventorRudolph Alexandre
Life of this patent
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Abstract
A memory system for use with a master-slave type bus such as an AHB bus has a memory, a bus interface to allow memory access from the bus, and a direct memory access interface to allow memory access from a DMA controller without occupying the bus. The system can reduce occupancy of the bus, it can allow dedicated DMA access protocols faster than the bus protocol to be used, and can remove or reduce the need for bus arbitration and associated circuitry and delays. An arbiter can arbitrate between the memory accesses and give priority to DMA accesses.
Claims11
A memory system for use with a master-slave type bus, the system having a memory, a bus interface to allow memory access from the bus, and a direct memory access interface to allow memory access from a DMA controller without occupying the bus.
A method of accessing a memory comprising using a bus interface for accessing the memory from a master-slave type bus, and using a direct memory access interface to access the memory access from a DMA controller without occupying the bus.
Dependencies are inferred from the claim text.