US 2006/0223274 A1 · Semiconductor device and manufacturing method thereof

Abstract

In general, this disclosure describes a semiconductor device that exhibits an increased resistance and reduced leakage current in a reverse-biased state, and a method for manufacturing such a semiconductor device. For example, in one embodiment, the increased resistance in the reverse-biased state is obtained by introducing either a P+ or P− type impurity in a polycrystalline silicon layer formed on an N− type epitaxial layer. Additionally, the semiconductor device maintains a low resistance in a forward-biased state. To keep the forward-biased resistance low, the polycrystalline silicon layer in the vicinity of a gate electrode may be of an N+ type. Furthermore, an N+ type source extracting region is formed on the surface of the polycrystalline silicon layer to connect a source electrode to a drain electrode and maintain a low resistance when forward-biased.

Claims17

Dependent claims

A method for manufacturing semiconductor devices comprising:

forming a hetero semiconductor region on a surface of a semiconductor substrate;
introducing an impurity of a first conducting type to a first portion of the hetero semiconductor region to form a first hetero semiconductor portion, wherein the first hetero semiconductor portion includes a first hetero bonded interface between the semiconductor substrate and the first hetero semiconductor region;
introducing an impurity of a second conducting type to a second portion of the hetero semiconductor region to form a second hetero semiconductor portion, wherein the second hetero semiconductor portion includes a second hetero bonded interface between the semiconductor substrate and the second hetero semiconductor portion;
forming a gate electrode adjacent to the second hetero bonded interface;
coupling a source electrode to the first hetero semiconductor portion and the second hetero semiconductor portion;
and
coupling a drain electrode to the semiconductor substrate.

4 more elements

Dependencies are inferred from the claim text.

Semiconductor device and manufacturing method thereof

Life of this patent

Semiconductor device and manufacturing method thereof

Life of this patent

Abstract

Claims17