Semiconductor device and method of manufacturing the same
AssigneeFujitsu Limited
InventorRyo Tanabe
Life of this patent
Estimating the term…
Abstract
Each of channel regions 2a and 3b is covered by a gate electrode 6 via a gate insulation film 5 and side wall spacers 9 from its top face to both side faces along an x-direction. In other words, there is no insulation material of an STI element isolation structure 4 on both side faces along the x-direction of each of the channel regions 2b and 3b (in a non-contact state), thereby preventing stress in a z-direction from being applied by the STI element isolation structure 4 to each of the channel region 2b and 2b.
Claims13
A semiconductor device, comprising:
- an element isolation structure formed by embedding an insulation material in a groove formed within an element isolation region of a semiconductor substrate;
- an active region defined in the semiconductor substrate by said element isolation structure;
- a gate electrode pattern-formed above said active region via a gate insulation film;
- and
- a transistor structure having a pair of impurity diffused layers formed within said active region on both sides of said gate electrode,
- wherein said element isolation structure is in a non-contact state with at least both side faces along a gate-length direction of a channel region constituting a substantial current passing region formed between said impurity diffused layers within said active region.
A method of manufacturing a semiconductor device, comprising the steps of:
- forming a groove within an element isolation region of a semiconductor substrate;
- embedding an insulation material in the groove to form an element isolation structure to thereby define an active region on the semiconductor substrate;
- partially removing the insulation material of the element isolation structure to expose a surface layer portion of the active region;
- pattern-forming a gate electrode in such a manner as to cover the surface layer portion from a top face to both side faces thereof via a gate insulation film;
- and
- introducing impurities into the active region on both sides of the gate electrode to form a pair of impurity diffused layers.
A method of manufacturing a semiconductor device, comprising the steps of:
- forming a groove within an element isolation region of a semiconductor substrate;
- embedding an insulation material in the groove to form an element isolation structure to thereby define an active region on the semiconductor substrate in a shape having protruding portions protruding from a pair of side faces of a rectangle respectively;
- pattern-forming a gate electrode in a shape extending along tops of the protruding portions via a gate insulation film above the active region;
- and
- introducing impurities into the active region on both sides of the gate electrode to form a pair of impurity diffused layers.
Dependencies are inferred from the claim text.