Method for manufacturing a semiconductor device

A method for manufacturing a semiconductor device, comprising:

• forming an insulation film on an semiconductor substrate;
• selectively removing the insulation film in an alignment mark-forming region and an SOI configuration-forming region, which are provided on the semiconductor substrate, by patterning the insulation film;
• selectively depositing a first semiconductor layer in the alignment mark-forming region and the SOI configuration-forming region by means of expitaxial growth;
• selectively depositing a second semiconductor layer, which has an etching rate smaller than an etching rate of the first semiconductor layer, on the first semiconductor layer by means of epitaxial growth;
• removing the insulation film on the semiconductor substrate after the second semiconductor layer is formed;
• forming a first exposing region for exposing the semiconductor substrate through the second semiconductor layer and the first semiconductor layer, by selectively etching the second semiconductor layer, the first semiconductor layer, and the semiconductor substrate in the SOI configuration-forming region;
• forming a supporter, which is configured of a material having an etching rate smaller than an etching rate of the first semiconductor layer, for supporting the second semiconductor layer on the semiconductor substrate through the first exposing region;
• forming a second exposing region for exposing the first semiconductor layer, by selectively etching the supporter, the second semiconductor layer, the first semiconductor layer, and the semiconductor substrate with reference to the second semiconductor layer in the alignment mark-forming region, by removing the second semiconductor layer and the first semiconductor layer in the alignment mark-forming region;
• forming a cavity, where the first semiconductor layer is removed, between the semiconductor substrate and the second semiconductor layer by selectively etching the first semiconductor layer through the second exposing region;
• forming a buried insulation layer that is buried in the cavity;
• forming a first grate electrode, which is provided through a first gate insulation film, on the second semiconductor layer by using the second alignment mark as a reference for positioning;
• and
• forming first source/drain layers, which are provided so as to sandwich the first grate electrode, on the second semiconductor layer.

A method for manufacturing a semiconductor device, comprising:

• forming an insulation film on an semiconductor substrate;
• selectively removing the insulation film in an alignment mark-forming region and an SOI configuration-forming region, which are provided on the semiconductor substrate, by patterning the insulation film;
• selectively depositing a first semiconductor layer in the alignment mark-forming region and the SOI configuration-forming region by means of expitaxial growth;
• selectively depositing a second semiconductor layer, which has an etching rate smaller than an etching rate of the first semiconductor layer, on the first semiconductor layer by means of epitaxial growth;
• removing the insulation film on the semiconductor substrate after the second semiconductor layer is formed;
• forming a first exposing region for exposing the semiconductor substrate through the second semiconductor layer and the first semiconductor layer, and the semiconductor substrate with reference to the second semiconductor layer in the alignment mark-forming region as an alignment mark for positioning;
• forming a supporter, which is configured of a material having an etching rate smaller than an etching rate of the first semiconductor layer, for supporting the second semiconductor layer on the semiconductor substrate through the first exposing region so that the supporter covers the first semiconductor layer and the second semiconductor layer in the alignment mark-forming region;
• forming a second exposing region for exposing the first semiconductor layer, after forming the supporter, by usuing the alignment mark as a feference for positioning;
• forming a cavity, where the first semiconductor layer is removed, between the semiconductor layer by selectively etching the first semiconductor layer through the second exposing region;
• forming a buried insulation layer that is buried in the cavity;
• forming a first grate electrode, which is provided through a first gate insulation film, on the second semiconductor layer by using the second alignment mark as a reference for positioning;
• and
• forming first source/drain layers, which are provided so as to sandwich the first grate electrode, on the second semiconductor layer.