Method of manufacturing semiconductor device

A method of manufacturing a semiconductor device, comprising:

• forming an insulating film on a semiconductor substrate;
• removing the insulating film selectively in a first alignment mark forming region and a silicon-on-insulator (SOI) structure forming region that are provided on the semiconductor substrate by patterning the insulating film;
• forming a first semiconductor layer selectively in the first alignment mark forming region and the SOI structure forming region by epitaxial growth;
• forming a second semiconductor layer whose etching rate is smaller than an etching rate of the first semiconductor layer selectively on the first semiconductor layer by the epitaxial growth;
• removing the insulating film on the semiconductor substrate after the second semiconductor layer is formed;
• forming a first exposure part by selectively etching the second semiconductor layer in the SOI structure forming region, the first semiconductor layer and the semiconductor substrate, the first exposure part penetrating the second semiconductor layer and the first semiconductor layer so as to expose the semiconductor substrate;
• forming a supporter made of a material with a smaller etching rate than the etching rate of the first semiconductor layer, the supporter supporting the second semiconductor layer on the semiconductor substrate through the first exposure part;
• forming a second exposure part and a second alignment mark by selectively etching the supporter, the second semiconductor layer, the first semiconductor layer and the semiconductor substrate as referring the position of the second semiconductor layer in the first alignment mark forming region as a first alignment mark for arrangement after the supporter is formed, the second exposure part exposing the first semiconductor layer, and the second alignment mark being formed in a second alignment mark forming region on the semiconductor substrate;
• forming a hollow part between the semiconductor substrate and the second semiconductor layer by selectively etching the first semiconductor layer through the second exposure part, the hollow part being made by removing the first semiconductor layer;
• forming a buried insulating layer that fills the hollow part;
• forming a first gate electrode by referring the second alignment mark as the reference point for arrangement, the first gate electrode being provided on the second semiconductor layer through a first gate insulating film;
• and
• forming a first source/drain layer that is arranged so as to hold the first gate electrode therebetween in the second semiconductor layer.

A method of manufacturing a semiconductor device, comprising:

• forming an insulating film on a semiconductor substrate;
• removing the insulating film selectively in a first alignment mark forming region and a silicon-on-insulator (SOI) structure forming region that are provided on the semiconductor substrate by patterning the insulating film;
• forming a first semiconductor layer selectively in the first alignment mark forming region and the SOI structure forming region by epitaxial growth;
• forming a second semiconductor layer whose etching rate is smaller than an etching rate of the first semiconductor layer selectively on the first semiconductor layer by the epitaxial growth;
• removing the insulating film on the semiconductor substrate after the second semiconductor layer is formed;
• forming a first exposure part and a second alignment mark by selectively etching the second semiconductor layer, the first semiconductor layer and the semiconductor substrate as referring the position of the second semiconductor layer in the first alignment mark forming region as a first alignment mark for arrangement, the first exposure part penetrating the second semiconductor layer and the first semiconductor layer so as to expose the semiconductor substrate, and the second alignment mark being formed in a second alignment mark forming region on the semiconductor substrate;
• forming a supporter made of a material with a smaller etching rate than the etching rate of the first semiconductor layer, the supporter supporting the second semiconductor layer on the semiconductor substrate through the first exposure part;
• forming a second exposure part and a third alignment mark by selectively etching the supporter, the second semiconductor layer, the first semiconductor layer and the semiconductor substrate as referring the position of the second alignment mark for arrangement after the supporter is formed, the second exposure part exposing the first semiconductor layer, and the third alignment mark being formed in a third alignment mark forming region on the semiconductor substrate;
• forming a hollow part between the semiconductor substrate and the second semiconductor layer by selectively etching the first semiconductor layer through the second exposure part, the hollow part being made by removing the first semiconductor layer;
• forming a buried insulating layer that fills the hollow part;
• forming a first gate electrode by referring the third alignment mark as the reference point for arrangement, the first gate electrode being provided on the second semiconductor layer through a first gate insulating film;
• and
• forming a first source/drain layer that is arranged so as to hold the first gate electrode therebetween in the second semiconductor layer.