Vertical transistor of semiconductor device and method for forming the same
AssigneeHynix Semiconductor Inc.
InventorWoo Chung
Life of this patent
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Abstract
A vertical transistor of a semiconductor device and a method for forming the same are disclosed. The vertical transistor comprises a silicon fin disposed on a semiconductor substrate, a source region disposed in the semiconductor substrate below a lower portion of the silicon fin, a drain region disposed in an upper portion of the silicon fin, a channel region disposed in a sidewall of the silicon fin between the source region and the drain region, a gate oxide film disposed in a surface of the semiconductor substrate and the sidewall of the silicon fin, and a pair of gate electrodes disposed on the gate oxide films.
Claims15
A vertical transistor of semiconductor device comprising
- a silicon fin disposed on a semiconductor substrate;
- a source region disposed in the semiconductor substrate below a lower portion of the silicon fin;
- a drain region disposed in an upper portion of the silicon fin;
- a channel region disposed in a sidewall of the silicon fin between the source region and the drain region;
- a gate oxide film disposed on a surface of the semiconductor substrate and the sidewall of the silicon fin;
- and
- a pair of gate electrodes disposed on the gate oxide films.
A method for forming a vertical transistor of a semiconductor device, comprising the steps of:
- (a) etching a semiconductor substrate to form a silicon fin;
- (b) performing an angled ion implant process to form a source region in the semiconductor substrate below a lower portion of the silicon fin;
- (c) performing a channel ion implant process to form a channel region in a sidewall of the silicon fin;
- (d) performing an ion implant process to form a drain region in an upper portion of the silicon fin;
- (e) forming a gate oxide film on a surface of the semiconductor substrate and the sidewall of the silicon fin;
- and
- (f) forming a pair of gate electrodes on both sidewalls of the silicon fin, wherein the gate electrode comprises a gate polysilicon layer and a gate metal layer.
A method for forming a vertical transistor, comprising the steps of:
- (a) performing an ion implant process on the top of a semiconductor substrate to form a drain region therein;
- (b) etching the semiconductor substrate to form a silicon fin having the drain region disposed therein;
- (c) performing an angled ion implant process to form a source region in the semiconductor substrate below a lower portion of the silicon fin;
- (d) performing a channel ion implant process to form a channel region in a sidewall of the silicon fin;
- (e) forming a gate oxide film on a surface of the semiconductor substrate and the sidewall of the silicon fin;
- and
- (f) forming a pair of gate electrodes on both sidewalls of the silicon fin, wherein the gate electrode comprises a gate polysilicon layer and a gate metal layer.
Dependencies are inferred from the claim text.