Method of manufacturing semiconductor device
AssigneeSanyo Electric Co., Ltd.
InventorsSeiji Otake, Shuichi Kikuchi
Life of this patent
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Abstract
Disclosed is that in a method of manufacturing a semiconductor device of the present invention, when first and second P type diffusion layers using as a backgate region, these layers are formed in such a way that their impurity concentration peaks are shifted, respectively. Then, in the backgate region, a concentration profile of a region where an N type diffusion layer is formed is gradually established. After that, impurity ions, which form the N type diffusion layer, are implanted, and thereafter a thermal treatment is performed to diffuse the N type diffusion layer in a y shape at a lower portion of a gate electrode. This manufacturing method makes it possible to implement an electric filed relaxation in a drain region.
Claims4
A method of manufacturing a semiconductor device, comprising the steps of:
- forming a backgate diffusion layer on a semiconductor layer and then forming a gate oxide film and a gate electrode on the semiconductor layer;
- and
- implanting impurity ions into the backgate diffusion layer and thereafter diffusing the impurity ions thereinto to form a source diffusion layer and a drain diffusion layer,
- wherein in the step of forming the drain diffusion layer, the drain diffusion layer is formed in order that the drain diffusion layer has a slope relative to a surface of the semiconductor layer and an angle formed by a tangent line of the slope and the surface of the semiconductor layer gets smaller toward the surface of the semiconductor layer.
Dependencies are inferred from the claim text.