Method for forming laminated structure and method for manufacturing semiconductor device using the method thereof
AssigneeOki Electric Industry Co., Ltd.
InventorYoshimi EGAWA
Life of this patent
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Abstract
A method for manufacturing a semiconductor device includes the steps of (a) preparing a wafer including a first circuit formation region and a first surrounding region, (b) laminating a first chip on the first circuit formation region, (c) pouring a first underfill into a first space between the first circuit formation region and the first chip from the first surrounding region, (d) hardening the first underfill, (e) forming a laminated structure comprised of a first chip block that includes a second chip including the first circuit formation region, the first chip, and the first underfill by conducting dicing with respect to the wafer; and (f) laminating the laminated structure on a substrate.
Claims6
A method for manufacturing a semiconductor device, comprising the steps of:
- preparing a wafer including a first circuit formation region and a first surrounding region formed to surround said first circuit formation region;
- laminating a first chip on said first circuit formation region, said first chip having a plane dimension that is substantially the same as a plane dimension of said first circuit formation region;
- pouring a first underfill into a first space between said first circuit formation region and said first chip from said first surrounding region;
- hardening said first underfill;
- forming a laminated structure comprised of a first chip block that includes a second chip including said first circuit formation region, said first chip, and said first underfill by conducting dicing with respect to said wafer;
- and
- laminating said laminated structure on a substrate.
A method for manufacturing a semiconductor device, comprising the steps of:
- preparing a wafer including a plurality of circuit formation regions and a first surrounding region formed to surround said plurality of said circuit formation regions;
- laminating a plurality of first chips on said plurality of said circuit formation regions, respectively, said plurality of said first chips having plane dimensions that are substantially the same as plane dimensions of said plurality of circuit formation regions, respectively;
- pouring a first underfill into first spaces between said plurality of said circuit formation regions and said plurality of said first chips from said first surrounding region;
- hardening said first underfill;
- and
- forming a plurality of first chip sub-blocks that include each of a plurality of second chips including each of said plurality of said circuit formation regions, each of said plurality of said first chips, and said first underfill by conducting dicing with respect to said wafer.
A method of manufacturing a semiconductor device, comprising the steps of:
- forming a first chip block by laminating a first chip that has a first plane dimension and includes a surrounding region and a second chip having a second plane dimension that is smaller than said first plane dimension;
- pouring a first underfill into a first space between said first chip and said second chip from said surrounding region;
- forming a laminated structure comprised of said first chip block by hardening said first underfill;
- and
- laminating said laminated structure on a substrate.
Dependencies are inferred from the claim text.