US 2006/0222131 A1 · Method for sampling reverse data and a reverse data sampling circuit for performing the same

Abstract

A method for sampling reverse data and a reverse data sampling circuit for performing the same are provided. The reverse data sampling method of a host interface device includes generating a multi-phase clock; sampling clocks corresponding to respective phases of the multi-phase clock at a transition of a reverse data signal to generate clock sampling signals; sampling the reverse data signal at a transition of the clocks corresponding to the respective phases of the multi-phase clock to generate data sampling signals; selecting a sampling clock from the clocks corresponding to the respective phases of the multi-phase clock by using the clock sampling signals and the data sampling signals; and sampling reverse data at a transition of the sampling clock.

Claims21

Dependent claims

A method of sampling reverse data of a host interface device, the method comprising:

generating a multi-phase clock;
sampling clocks corresponding to respective phases of the multi-phase clock at a transition of a reverse data signal to generate clock sampling signals;
sampling the reverse data signal at a transition of the clocks corresponding to the respective phases of the multi-phase clock to generate data sampling signals;
selecting a sampling clock from the clocks corresponding to the respective phases of the multi-phase clock by using the clock sampling signals and the data sampling signals;
and
sampling reverse data at a transition of the sampling clock.

3 more elements

A reverse data sampling circuit of a host interface device, comprising:

a multi-phase clock generation unit configured to generate a multi-phase clock;
a selection signal generation unit configured to sample clocks corresponding to respective phases of the multi-phase clock to generate clock sampling signals at a transition of a reverse data signal, sample the reverse data signal at a transition of the clocks corresponding to the respective phases of the multi-phase clock to generate data sampling signals, and generate a selection signal by using the clock sampling signals and the data sampling signals;
a selection unit configured to select a sampling clock from the clocks corresponding to the respective phases of the multi-phase clock by using the selection signal;
and
a sampling unit configured to sample reverse data at a transition of the sampling clock.

2 more elements

Dependencies are inferred from the claim text.

Method for sampling reverse data and a reverse data sampling circuit for performing the same

Life of this patent

Method for sampling reverse data and a reverse data sampling circuit for performing the same

Life of this patent

Abstract

Claims21