Automatic gain control for a wireless receiver

A processor configured to select a first gain for analog circuitry from among multiple discrete gain values and to select a second gain for a digital variable gain amplifier (DVGA), wherein the first gain maintains average power of a baseband signal within a predetermined range at an input of an analog-to-digital converter (ADC), and wherein the second gain maintains average power of an output signal from the DVGA at a reference power level.

A method comprising:

• selecting a first gain for analog circuitry from among multiple discrete gain values, wherein the first gain maintains average power of a baseband signal within a predetermined range at an input of an analog-to-digital converter (ADC);
• and
• selecting a second gain for a digital variable gain amplifier (DVGA), wherein the second gain maintains average power of an output signal from the DVGA at a reference power level.

An apparatus comprising:

• means for selecting a first gain for analog circuitry from among multiple discrete gain values, wherein the first gain maintains average power of a baseband signal within a predetermined range at an input of an analog-to-digital converter (ADC);
• and
• means for selecting a second gain for a digital variable gain amplifier (DVGA), wherein the second gain maintains average power of an output signal from the DVGA at a reference power level.

Computer-readable medium encoded with a computer program to:

• select a first gain for analog circuitry from among multiple discrete gain values, wherein the first gain maintains average power of a baseband signal within a predetermined range at an input of an analog-to-digital converter (ADC);
• and
• select a second gain for a digital variable gain amplifier (DVGA), wherein the second gain maintains average power of an output signal from the DVGA at a reference power level.

An apparatus comprising:

• at least one processor configured to determine a logarithmic (log) error in an output signal level, to filter the log error with a loop filter to obtain a loop filter output, and to determine a first gain based on the loop filter output, wherein the first gain is used to correct the log error in the output signal level;
• and
• a memory coupled to the at least one processor.

A processor configured to determine a logarithmic (log) error in an output signal level, to filter the log error with a loop filter to obtain a loop filter output, and to determine a first gain based on the loop filter output, wherein the first gain is used to correct the log error in the output signal level.

An apparatus comprising:

• at least one processor configured to update an automatic gain control (AGC) loop at a first update rate in an acquisition mode and to update the AGC loop at a second update rate in a tracking mode, wherein the second update rate is slower than the first update rate;
• and
• a memory coupled to the at least one processor.

A processor configured to update an automatic gain control (AGC) loop at a first update rate in an acquisition mode and to update the AGC loop at a second update rate in a tracking mode, wherein the second update rate is slower than the first update rate.

A method comprising:

• updating an automatic gain control (AGC) loop at a first update rate in an acquisition mode;
• and
• updating the AGC loop at a second update rate in a tracking mode, wherein the second update rate is slower than the first update rate.

An apparatus comprising:

• means for updating an automatic gain control (AGC) loop at a first update rate in an acquisition mode;
• and
• means for updating the AGC loop at a second update rate in a tracking mode, wherein the second update rate is slower than the first update rate.

Computer-readable medium encoded with a computer program to:

• update an automatic gain control (AGC) loop at a first update rate in an acquisition mode, and
• update the AGC loop at a second update rate in a tracking mode, wherein the second update rate is slower than the first update rate.