Sense Amplifier Overdriving Circuit and Semiconductor Device Using the Same
AssigneeHynix Semiconductor Inc.
InventorSung Xi
Life of this patent
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Abstract
A sense amplifier overdriving circuit includes a first voltage driver which supplies an internal voltage from an internal voltage terminal to a sense amplifier in response to a first enabling signal, a logic unit which logically operates a block select signal for selection of a cell block and a second enabling signal enabled for a predetermined time after enabling of the first enabling signal, and outputs the resultant signal, and a second voltage driver which supplies an external voltage to the internal voltage terminal in response to the signal output from the logic unit. A semiconductor device using the sense amplifier overdriving circuit is also disclosed.
Claims16
A sense amplifier overdriving circuit comprising:
- a first voltage driver to supply an internal voltage from an internal voltage terminal to a sense amplifier in response to a first enabling signal;
- a logic unit to logically operate a block select signal for selection of a cell block and a second enabling signal enabled for a predetermined time after enabling of the first enabling signal, and outputs the resultant signal;
- and
- a second voltage driver which supplies an external voltage to the internal voltage terminal in response to the signal output from the logic unit.
A semiconductor device comprising a plurality of sense amplifier overdriving circuits each adapted to overdrive sense amplifiers at an external voltage level for a predetermined period, so as to prevent an abrupt drop in internal voltage during operation of the sense amplifiers, wherein each of the sense amplifier overdriving circuits comprises:
- a first voltage driver to supply an internal voltage from an internal voltage terminal to at least one of the sense amplifiers associated with the sense amplifier overdriving circuit in response to a first enabling signal;
- a logic unit to logically operate a block select signal for selection of a cell block and a second enabling signal enabled for a predetermined time after enabling of the first enabling signal, and outputs the resultant signal;
- and
- a second voltage driver to supply an external voltage to the internal voltage terminal in response to the signal output from the logic unit.
Dependencies are inferred from the claim text.