Controller apparatus for utilizing downgrade memory and method for operating the same
OwnerChang-Lien Yanginventor
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Abstract
A controller apparatus for utilizing downgrade memory and method for operating the same are proposed. The controller apparatus uses address assignment to access the downgrade memory, which is classified by accessible address after testing. The controller apparatus is applicable to various applications, including memory interface controller for the accessing of a sub system. The controller apparatus can be integrated into the sub system within single chip. The controller apparatus further comprises at least one recording unit to record the initialization format and address mapping relation of a specific downgrade memory. Therefore, controller apparatus can be adapted to access various kinds of downgrade memory designated by the recording unit.
Claims22
A memory controller for helping a memory requester to access a downgrade memory, the downgrade memory comprising a defect area and a non-defect area, the memory controller is configured for mapping a subset of the non-defect area to the memory requester.
An electronic system using a downgrade memory, the downgrade memory comprising a defect area and a non-defect area, the electronic system comprising
- a memory requester requiring a memory space of first number, which is smaller than the non-defect area;
- and
- a memory controller configured to map a subset of the non-defect area to the memory requester.
A method for controlling a downgrade memory for a memory requester, the downgrade memory comprising a defect area and a non-defect area, the memory requester requesting a first number of addressable space, the method comprising:
- stetting X physical address lines connected to the downgrade memory, wherein the X physical address lines provide p linked logical addresses and 2p is larger than the first number;
- mapping a subset of the p linked logical addresses to the memory requester.
Dependencies are inferred from the claim text.