Semiconductor memory device and semiconductor device
AssigneeHitachi, Ltd.
InventorsMasahiro Yamashita, Takashi Uehara, Mamoru Takaku, Hiroaki Nambu
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AssigneeHitachi, Ltd.
InventorsMasahiro Yamashita, Takashi Uehara, Mamoru Takaku, Hiroaki Nambu
Estimating the term…
A technology capable of improving the yield by the trimming of internal properties of a semiconductor device is provided. A semiconductor device is provided with an internal voltage step-down circuit and an internal voltage step-up circuit whose property values (internal voltage and others) are variable, a fuse circuit unit, a JTAG function unit 304 which inputs and retains signals from outside, a control circuit which perform logical operation based on an output signal of the fuse circuit unit and an output signal of the JTAG function unit, and the property values of the internal voltage step-down circuit and the internal voltage step-up circuit are controlled based on a result of the logical operation by the control circuit.
A semiconductor memory device comprising:
A semiconductor device comprising:
Dependencies are inferred from the claim text.