System and method for hardening MRAM bits
AssigneeHoneywell International Inc.
InventorsOwen Hynes, Romney Katti, Harry Liu, Michael Liu
Life of this patent
Estimating the term…
Abstract
A system and method for protecting MRAM bits during a dose rate event is described. A device is connected in parallel with an MTJ structure of an MRAM bit to shunt photocurrent away from and/or limit voltage across the MTJ structure during a dose rate event. The device may include at least one transistor and/or at least one diode. One device may be used to protect an entire row and/or column of MRAM bits.
Claims21
A hardened magnetoresistive random access memory bit, comprising in combination:
- a magnetic tunnel junction connected in series to a first transistor, wherein a photocurrent is generated in the first transistor during a dose rate event;
- and
- a device connected in parallel with the magnetic tunnel junction that is operable to protect the magnetic tunnel junction during the dose rate event.
A method of protecting a magnetoresistive random access memory bit during a dose rate event, comprising connecting a first transistor in parallel with a magnetic tunnel junction, wherein the magnetoresistive random access memory bit includes the magnetic tunnel junction connected in series with a second transistor.
A method of protecting a magnetoresistive random access memory bit during a dose rate event, comprising connecting at least one diode in parallel with a magnetic tunnel junction, wherein the magnetoresistive random access memory bit includes the magnetic tunnel junction connected in series with a transistor.
Dependencies are inferred from the claim text.