Gate driver and display device having the same

Abstract

A display device is set forth that comprises a display panel having a plurality of pixels arranged in a matrix. A data driver supplies pixel drive signals to data lines that are connected to drive the individual pixels of at least one row of pixels with corresponding pixel drive signals. The display device also includes a gate driver that supplies gate drive signals to the gate lines of the matrix. Each gate line may be connected to concurrently drive at least one row of pixels with a respective gate drive signal. The gate driver may comprise a sequence of shift registers that are connected in cascade with one another and two or more phase clocks that are connected to drive the sequence of shift registers. The shift registers of the gate driver may be interconnected with one another so that a shift register to which a given phase clock is applied is reset using an output signal from a next occurring shift register in the sequence of shift registers that is also connected to the given phase clock.

Dependencies are inferred from the claim text.