Signal processing apparatus, signal processing method, and noise reducing apparatus

A signal processing apparatus comprising:

• a signal processing device for performing signal processing for an n-bit output signal (n is an integer) and for outputting an (n+m)-bit intermediate signal (m is an integer);
• a bit-number converting device for converting the number of bits of the intermediate signal from (n+m) bits to n bits, by selectively performing either a round-up process or a round-down process for a lower m bits of the intermediate signal outputted from said signal processing device, in accordance with an execution pattern;
• and
• an adding device for adding the intermediate signal with the number of bits converted by said bit-number converting device and an n-bit input signal, and for outputting an n-bit output signal,
• said bit-number converting device comprising an execution pattern generating device for generating the execution pattern to determine whether the round-up process is performed or the round-down process is performed,
• the execution pattern generating device determining a ratio of the number of times of execution of the round-up process and the number of times of execution of the round-down process in the execution pattern, such that the ratio varies depending on a numerical value shown by the lower m bits of the intermediate signal outputted from said signal processing device.

A signal processing method comprising:

• a signal processing process of performing signal processing for an n-bit output signal (n is an integer) and of outputting an (n+m)-bit intermediate signal (m is an integer);
• a random number adding process of adding a random number which is m bits or less, to the intermediate signal outputted in said signal processing process;
• a rounding-down process of converting the number of bits of the intermediate signal from (n+m) bits to n bits, by rounding down a lower m bits of the intermediate signal to which the random number is added in said random number adding process;
• and
• an adding process of adding the intermediate signal with the number of bits converted in said rounding-down process and an n-bit input signal, and of outputting an n-bit output signal.

A signal processing method comprising:

• a signal processing process of performing signal processing for an n-bit output signal (n is an integer) and of outputting an (n+m)-bit intermediate signal (m is an integer);
• a bit-number converting process of converting the number of bits of the intermediate signal from (n+m) bits to n bits, by selectively performing either a round-up process or a round-down process for a lower m bits of the intermediate signal outputted in said signal processing process, in accordance with an execution pattern;
• and
• an adding process of adding the intermediate signal with the number of bits converted in said bit-number converting process and an n-bit input signal, and of outputting an n-bit output signal,
• said bit-number converting process comprising an execution pattern generating process of generating the execution pattern to determine whether the round-up process is performed or the round-down process is performed,
• the execution pattern generating process determining a ratio of the number of times of execution of the round-up process and the number of times of execution of the round-down process in the execution pattern, such that the ratio varies depending on a numerical value shown by the lower m bits of the intermediate signal outputted in said signal processing process.

A computer program product in a computer-readable medium for tangibly embodying a program of instructions executable by a computer, to make the computer function as a signal processing apparatus comprising:

• a signal processing device for performing signal processing for an n-bit output signal (n is an integer) and for outputting an (n+m)-bit intermediate signal (m is an integer);
• a random number adding device for adding a random number which is m bits or less, to the intermediate signal outputted from said signal processing device;
• a rounding-down device for converting the number of bits of the intermediate signal from (n+m) bits to n bits, by rounding down a lower m bits of the intermediate signal to which the random number is added by said random number adding device;
• and
• an adding device for adding the intermediate signal with the number of bits converted by said rounding-down device and an n-bit input signal, and for outputting an n-bit output signal.

A computer program product in a computer-readable medium for tangibly embodying a program of instructions executable by a computer, to make the computer function as a signal processing apparatus comprising:

• a signal processing device for performing signal processing for an n-bit output signal (n is an integer) and for outputting an (n+m)-bit intermediate signal (m is an integer);
• a bit-number converting device for converting the number of bits of the intermediate signal from (n+m) bits to n bits, by selectively performing either a round-up process or a round-down process for a lower m bits of the intermediate signal outputted from said signal processing device, in accordance with an execution pattern;
• and
• an adding device for adding the intermediate signal with the number of bits converted by said bit-number converting device and an n-bit input signal, and for outputting an n-bit output signal,
• said bit-number converting device comprising an execution pattern generating device for generating the execution pattern to determine whether the round-up process is performed or the round-down process is performed,
• the execution pattern generating device determining a ratio of the number of times of execution of the round-up process and the number of times of execution of the round-down process in the execution pattern, such that the ratio varies depending on a numerical value shown by the lower m bits of the intermediate signal outputted from said signal processing device.

A noise reducing apparatus, comprising a signal processing apparatus and performing a noise reducing process by using said signal processing apparatus,

• said signal processing apparatus comprising:
• a signal processing device for performing signal processing for an n-bit output signal (n is an integer) and for outputting an (n+m)-bit intermediate signal (m is an integer);
• a random number adding device for adding a random number which is m bits or less, to the intermediate signal outputted from said signal processing device;
• a rounding-down device for converting the number of bits of the intermediate signal from (n+m) bits to n bits, by rounding down a lower m bits of the intermediate signal to which the random number is added by said random number adding device;
• and
• an adding device for adding the intermediate signal with the number of bits converted by said rounding-down device and an n-bit input signal, and for outputting an n-bit output signal.

A noise reducing apparatus, comprising a signal processing apparatus and performing a noise reducing process by using said signal processing apparatus,

• said signal processing apparatus comprising:
• a signal processing device for performing signal processing for an n-bit output signal (n is an integer) and for outputting an (n+m)-bit intermediate signal (m is an integer);
• a bit-number converting device for converting the number of bits of the intermediate signal from (n+m) bits to n bits, by selectively performing either a round-up process or a round-down process for a lower m bits of the intermediate signal outputted from said signal processing device, in accordance with an execution pattern;
• and
• an adding device for adding the intermediate signal with the number of bits converted by said bit-number converting device and an n-bit input signal, and for outputting an n-bit output signal,
• said bit-number converting device comprising an execution pattern generating device for generating the execution pattern to determine whether the round-up process is performed or the round-down process is performed,
• the execution pattern generating device determining a ratio of the number of times of execution of the round-up process and the number of times of execution of the round-down process in the execution pattern, such that the ratio varies depending on a numerical value shown by the lower m bits of the intermediate signal outputted from said signal processing device.