Clock jitter calculation device, clock jitter calculation method, and clock jitter calculation program
AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsTakafumi Nakashiba, Takahiro Ochi, Mitsuko Takada
Life of this patent
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Abstract
In a voltage drop analysis step S101, the process calculates a temporal variation of a power source voltage supplied to each cell along a transmission path of a clock signal. In a delay variation rate ratio calculation step S102, the process calculates a delay time variation of each cell according to the power source voltage variation. In a clock delay variation amount calculation step S103, the process obtains the magnitude of jitter of the clock signal based on the delay time variation.
Claims18
A clock jitter calculation device for calculating a magnitude of jitter of a clock signal based on information representing a circuit configuration, comprising:
- a supply voltage analysis section for calculating a variation over a predetermined period of time in a supply voltage of a power source supplied to each cell along a transmission path of the clock signal;
- a delay time variation calculation section for calculating a variation in delay time of each cell according to the supply voltage variation;
- and
- a jitter calculation section for calculating the magnitude of jitter of the clock signal transmitted via the transmission path based on the delay time variation.
A clock jitter calculation method for calculating a magnitude of jitter of a clock signal based on information representing a circuit configuration, the method comprising:
- a supply voltage analysis step of calculating a variation over a predetermined period of time in a supply voltage as a power source supplied to each cell along a transmission path of the clock signal;
- a delay time variation calculation step of calculating a variation in delay time of each cell according to the supply voltage variation;
- a jitter calculation step of calculating the magnitude of jitter of the clock signal transmitted via the transmission path based on the delay time variation.
A clock jitter calculation program for calculating a magnitude of jitter of a clock signal based on information representing a circuit configuration, the program instructing a computer to perform:
- a supply voltage analysis step of calculating a variation over a predetermined period of time in a supply voltage as a power source supplied to each cell along a transmission path of the clock signal;
- a delay time variation calculation step of calculating a variation in delay time of each cell according to the supply voltage variation;
- and
- a jitter calculation step of calculating the magnitude of jitter of the clock signal transmitted via the transmission path based on the delay time variation.
Dependencies are inferred from the claim text.