System, method and program product for well-bias set point adjustment
AssigneeFreescale Semiconductor, Inc.
InventorsGregory Ward, Mohamed Moosa, Mahbub Rashed
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AssigneeFreescale Semiconductor, Inc.
InventorsGregory Ward, Mohamed Moosa, Mahbub Rashed
Estimating the term…
A well-bias system dynamically adjusts well-bias set points to optimal levels across an integrated circuit (IC) for enhanced power savings and component reliability during a standby or low-power mode of operation. A controller within the IC determines if the chip power supply voltage will be reduced during an imminent standby or low power mode and sets a register controlling a negative well-bias set point for asserting well-bias to charge wells of the IC accordingly. To minimize leakage current without compromising reliability, the well-bias set point is set to (1) an optimal well-bias set point if a reduced supply voltage is to be applied to the IC, or (2) a minimum well-bias set point when a nominal or high supply voltage is to be applied to the IC.
A system comprising:
A method comprising:
An article of manufacture comprising a machine-readable medium including program logic embedded therein for setting a well-bias point that causes circuitry to perform the steps of:
Dependencies are inferred from the claim text.