Voltage Level Detection Circuit

Abstract

A voltage level detection circuit is disclosed. The detection circuit may include a pull-up unit including a plurality of pull-up devices, each for supplying an internal voltage in response to a signal resulting from a logic operation of a voltage up control signal and a voltage down control signal, a voltage division unit including a plurality of voltage dividers, each for dividing the internal voltage from a corresponding one of the pull-up device, a switching unit including a plurality of switching devices, each for switching and supplying an output voltage from a corresponding one of the voltage dividers to an output node in response to a signal resulting from a logic operation of the voltage up control signal and voltage down control signal, and a comparator for comparing the voltage at the output node with a predetermined reference voltage and outputting a voltage pumping enable signal according to a result of the comparison.

Dependencies are inferred from the claim text.