Semiconductor device

A semiconductor device, comprising:

• an internal circuit having a data holding circuit, and
• at least one leakage current cut-off circuit which electrically connects or cuts at least one of a path between a power supply and the internal circuit and a path between a ground and the internal circuit on the basis of a control signal,
• the leakage current cut-off circuit for electrically connecting or cutting the path between the power supply and the internal circuit including:
• a first switch for electrically connecting or cutting a path between the power supply and a source of a power-supply-side transistor of the internal circuit on the basis of a first pulse signal, and
• a first control circuit which, when the internal circuit is out of an operational mode, puts the first switch into a connected state for a first predetermined time period at first predetermined time intervals,
• wherein the first time interval is shorter than the time required for a potential at the source of the power-supply-side transistor to drop to a predetermined potential that is higher than a potential necessary for holding data in the data holding circuit after the first control circuit causes the first pulse signal to become a first state such that the first switch is put into a cut-off state, and
• the first time period is equivalent to the time required for the potential at the source of the power-supply-side transistor to become substantially equal to a potential of the power supply after the first control circuit causes the first pulse signal to become a second state,
• whereas when the internal circuit is in the operational mode, the first control circuit causes the first pulse signal to become the second state such that the first switch is put into the connected state, and
• the leakage current cut-off circuit for electrically connecting or cutting the path between the ground and the internal circuit including:
• a second switch for electrically connecting or cutting a path between a source of a ground-side transistor of the internal circuit and the ground on the basis of a second pulse signal, and
• a second control circuit which, when the internal circuit is out of the operational mode, puts the second switch into the connected state for a second predetermined time period at second predetermined time intervals,
• wherein the second predetermined time interval is shorter than the time required for a potential at the source of the ground-side transistor to rise to a predetermined potential that is lower than a potential necessary for holding the data in the data holding circuit after the second control circuit causes the second pulse signal to become the first state such that the second switch is put into the cut-off state,
• the second time period is equivalent to the time required for the potential at the source of the ground-side transistor to become substantially equal to a potential of the ground after the second control circuit causes the second pulse signal to become the second state,
• whereas when the internal circuit is in the operational mode, the second control signal causes the second pulse signal to become the second state such that the second switch is put into the connected state.