Semiconductor chip package and manufacturing method thereof

A method for manufacturing a semiconductor chip package, comprising the steps of:

• preparing a first semiconductor chip corresponding to an MEMS chip including a frame section having an upper surface and a lower surface opposite to the upper surface, a movable structure including a movable section provided in the frame section, and a plurality of first bumps arranged on the upper surface side of the frame section along edges of the upper surface;
• preparing a second semiconductor chip having a first surface and a second surface opposite to the first surface and having a plurality of second bumps arranged on the first surface side along edges of the first surface;
• preparing a substrate having a first main surface and a second main surface opposite to the first main surface, a plurality of electrode pads provided on the first main surface side and respectively directly connected to the first or second bumps in opposing relationship to the first or second bumps, and external terminals respectively connected to the electrode pads and provided on the second main surface side;
• connecting the electrode pads of the substrate and the first or second bumps and mounting the first and second semiconductor chips onto the substrate in parallel with each other on the first main surface side;
• forming a closed ring-shaped first sealing section which surrounds arrangements of the plurality of first bumps to seal a space between the frame section of the first semiconductor chip and the substrate;
• and
• forming a second sealing section which covers the first semiconductor chip, the second semiconductor chip, the first sealing section and the first main surface to seal the same.

A method for manufacturing a semiconductor chip package, comprising the steps of:

• preparing a first semiconductor chip including a frame section having an upper surface and a lower surface opposite to the upper surface, a movable structure including a movable section provided in the frame section, a plurality of first bumps arranged on the upper surface side of the frame section along edges of the upper surface, and a closed ring-shaped adhesive which exposes parts of the first bumps and are provided on the upper surface along the edges of the upper surface;
• preparing a second semiconductor chip having a first surface and a second surface opposite to the first surface and having a plurality of second bumps arranged on the first surface side along edges of the first surface;
• preparing a substrate having a first main surface and a second main surface opposite to the first main surface, a plurality of electrode pads provided on the first main surface side and respectively directly connected to the first or second bumps in opposing relationship to the first or second bumps, and external terminals respectively connected to the electrode pads and provided on the second main surface side;
• connecting the electrode pads of the substrate and the first or second bumps, mounting the first and second semiconductor chips onto the substrate in parallel with each other on the first main surface side, and mounting the first semiconductor chip in such a manner that the closed ring-shaped adhesive serves as a closed ring-shaped adhesive sealing section which bonds the frame section and the substrate to each other;
• and
• forming a second sealing section which covers the first semiconductor chip, the second semiconductor chip, the adhesive sealing section and the first main surface to seal the same, except for an area defined by the adhesive sealing section, which corresponds to a space defined between the first semiconductor chip and the substrate.