Multi-chip package and method for manufacturing the same
OwnerDae-Ho Leeinventor
Life of this patent
Estimating the term…
Abstract
A multi-chip package includes a first chip group including at least one semiconductor chip on a substrate. The first chip group may be sealed to form a first package body. Connecting test terminals to ball pads allows package-level testing of the first chip group. A second chip group including at least one semiconductor chip may be provided on the first package body. The first package body and the second chip group may be sealed to form a second package body. The multi-chip package may further comprise an interposer substrate provided between the first package body and, for example, the lowest semiconductor chip of the second chip group. The interposer substrate may electrically connect the second chip group to the substrate.
Claims20
A multi-chip package comprising:
- a substrate having substrate pads formed on a first surface and ball pads formed on a second surface, the first surface opposite the second surface, the ball pads being electrically connected to the substrate pads;
- a first chip group including at least one semiconductor chip, the first chip group being mounted on the substrate and electrically connected to the substrate pads;
- a first package body containing the first chip group;
- a second chip group including at least one semiconductor chip, the second chip group being mounted on the first package body and electrically connected to the substrate pads;
- and
- a second package body containing the first package body and the second chip group.
A method for manufacturing a multi-chip package comprising:
- preparing a substrate, the substrate having substrate pads formed on a first surface and ball pads formed on a second surface, the first surface opposite the second surface, the ball pads being electrically connected to the substrate pads;
- mounting a first chip group, including at least one semiconductor chip, on the substrate to electrically connect the first chip group to the substrate pads;
- forming a first package body including the first chip group;
- connecting test terminals to the ball pads and testing the first chip group;
- mounting a second chip group, including at least one semiconductor chip, relative to the first package body to electrically connect the second chip group to the substrate pads;
- and
- forming a second package body including the first package body and the second chip group.
A method for manufacturing a multi-chip semiconductor package, the method comprising:
- packaging as a first package a first chip group including at least one semiconductor chip;
- testing the first chip group at external terminals of the first package;
- and
- packaging as a second package the first package and a second chip group including at least one semiconductor chip.
The method of claim 18 wherein the first chip group comprises at least one memory chip and the second chip group comprises at least one logic chip.
Dependencies are inferred from the claim text.