Terminal layer setting method for semiconductor circuit having a plurality of circuit layers, storage media storing terminal layer setting program, storage media storing a wiring terminal extension processing program and terminal extending component used for setting of the terminal layer

A storage media storing a wiring terminal extension processing program, in the program for making a computer execute an extension processing for a wiring terminal based on a result of setting up a terminal layer which is a layer at an extending destination of a wiring terminal of a cell or macro constituting a semiconductor circuit having a plurality of wiring layers, wherein

• the program makes the computer execute:
• extending a wiring terminal of a subject cell or macro to a wiring layer, which is set up as an extending destination, by adding a necessary number of terminal extending components, each of which comprises a Via and a wiring having a length thereof for adequately securing a contact with the Via, in the normal direction to a surface which the subject cell or macro is mounted onto.

A storage media storing a terminal layer setting program, in the program for making a computer set up a terminal layer of a semiconductor circuit having a plurality of wiring layers, wherein the program makes the computer execute:

• obtaining various kinds of information such as placement information relating to a plurality of cells or macros constituting the semiconductor circuit and being mounted onto a circuit board from a storage unit of the computer;
• and
• setting up terminal layers, which are wiring layers at an extending destination of the plurality of cells or macros, by using a certain logic based on the obtained information so as to allocate, in a well-balanced manner, the plurality of wiring layers, and extending wiring terminals of the plurality of cells or macros to wiring layers set up as extending destinations in the shortest paths.

A terminal extending component, in the component used for setting up a terminal layer which is a wiring layer at an extending destination of a wiring terminal of a cell or macro constituting a semiconductor circuit having a plurality of wiring layers, wherein:

• Said component is used for extending a wiring terminal of a subject cell or macro in a direction normal to a surface which the cell or macro is mounted onto, and comprising a Via and a wire having length for adequately securing a contact with the Via.