Stacked semiconductor package
AssigneeMatsushita Electric Industrial Co., Ltd.
InventorToshitaka Akahoshi
Life of this patent
Estimating the term…
Abstract
A metal pattern for heat dissipation is formed on the backside of a second semiconductor substrate, the metal pattern being in contact with a first semiconductor element mounted on a semiconductor device adjacent to the backside. Vias are formed on the peripheries of semiconductor substrates, the vias penetrating in the thickness direction to transmit heat. The vias and the metal pattern for heat dissipation are connected to each other on the backside of the semiconductor substrate. Solder balls disposed between the semiconductor devices transmit heat having been transmitted to the metal pattern of the semiconductor device to the vias of the semiconductor device adjacent to the backside of the semiconductor device having the metal pattern.
Claims8
A stacked semiconductor package, in which semiconductor devices each having a semiconductor element mounted on a surface of a semiconductor substrate are stacked in a plurality of stages,
- the semiconductor package comprising:
- a metal pattern formed for heat dissipation on a backside of the semiconductor substrate, the metal pattern being in contact with a structure covering the semiconductor element mounted on the semiconductor device adjacent to the backside;
- vias formed on a periphery of the semiconductor substrate, the vias penetrating in a thickness direction to transmit heat, the vias and the metal pattern for heat dissipation being connected to each other on the backside of the semiconductor substrate;
- and
- solder balls disposed between the semiconductor devices, the solder balls transmitting heat having been transmitted to the metal pattern of the semiconductor device to the vias of the semiconductor device adjacent to a backside of the semiconductor device having the metal pattern.
A stacked semiconductor package, in which semiconductor devices each having a semiconductor element flip-chip mounted on a surface of a semiconductor substrate are stacked in a plurality of stages,
- the semiconductor package comprising:
- a metal pattern formed for heat dissipation on a backside of the semiconductor substrate, the metal pattern being in contact with the semiconductor element mounted on the semiconductor device adjacent to the backside;
- vias formed on a periphery of the semiconductor substrate, the vias penetrating in a thickness direction to transmit heat, the vias and the metal pattern for heat dissipation being connected to each other on the backside of the semiconductor substrate;
- and
- solder balls disposed between the semiconductor devices, the solder balls transmitting heat having been transmitted to the metal pattern of the semiconductor device to the vias of the semiconductor device adjacent to a backside of the semiconductor device having the metal pattern.
Dependencies are inferred from the claim text.