Semiconductor device and method for manufacturing same
AssigneeKabushiki Kaisha Toshiba
InventorsWataru Saito, Ichiro Omura
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Abstract
The present semiconductor device comprises pillar layers formed on a first semiconductor layer, the pillar layers comprising a first semiconductor pillar layer of a first conductivity type and a second semiconductor pillar layer of a second conductivity type which are alternately formed in a first direction along a surface of the first semiconductor layer. A semiconductor base layer of the second conductivity type is selectively formed on the surface of the second semiconductor pillar layer. A guard ring layer of the second conductivity type is formed surrounding the outermost periphery of the semiconductor base layer. The semiconductor base layer has a smaller junction depth than the guard ring layer.
Claims14
A semiconductor device comprising:
- a first semiconductor layer of a first conductivity type;
- a pillar layer formed on the first semiconductor layer, the pillar layer comprising a first semiconductor pillar layer of a first conductivity type and a second semiconductor pillar layer of a second conductivity type which are alternately formed in a first direction along a surface of the first semiconductor layer;
- a first main electrode electrically connected to the first semiconductor layer;
- a semiconductor base layer of the second conductivity type selectively formed on a surface of the second semiconductor pillar layer ;
- a semiconductor diffusion layer of the first conductivity type selectively formed on a surface of the semiconductor base layer;
- a second main electrode formed in contact with the semiconductor base layer and semiconductor diffusion layer;
- and
- a control electrode formed via an insulating film on the semiconductor base layer, semiconductor diffusion layer, and first semiconductor pillar layer,
- the semiconductor device further comprising a guard ring layer of the second conductivity type formed surrounding an outermost periphery of the semiconductor base layer, and
- the semiconductor base layer having a smaller junction depth than the guard ring layer.
A method for manufacturing a semiconductor device comprising:
- forming on a first semiconductor layer of a first conductivity type a second semiconductor layer of the first conductivity type having a lower impurity concentration than the first semiconductor layer;
- forming a plurality of equally spaced trenches in the second semiconductor layer;
- embedding a semiconductor layer of a second conductivity type in the trench to form pillar layers comprising a first semiconductor pillar layer of the first conductivity type and a second semiconductor pillar layer of the second conductivity type which are alternately formed on the first semiconductor layer;
- forming on the pillar layers a guard ring layer of the second conductivity type surrounding a device region, the guard ring layer having a first junction depth;
- forming in the device region a semiconductor base layer having a second junction depth smaller than the first junction depth.
A method for manufacturing a semiconductor device comprising:
- forming on a first semiconductor layer of a first conductivity type a second semiconductor layer of the first conductivity type having a lower impurity concentration than the first semiconductor layer;
- forming on the second semiconductor layer a guard ring layer of a second conductivity type surrounding a device region, the guard ring layer having a first junction depth;
- forming a plurality of equally spaced trenches in the second semiconductor layer, inducing a position of the guard ring layer;
- embedding a semiconductor layer of the second conductivity type in the trench to form pillar layers comprising a first semiconductor pillar layer of the first conductivity type and a second semiconductor pillar layer of the second conductivity type which are alternately formed on the first semiconductor layer;
- forming on a surface of the pillar layers a semiconductor base layer having a second junction depth smaller than the first junction depth.
Dependencies are inferred from the claim text.