Dynamically tunable resistor or capacitor using a non-volatile floating gate memory cell

A programmable capacitor comprising:

• a first capacitor having a first end connected to a first node, and a second end connected to a second node;
• a non-volatile floating gate memory cell having a first and a second region in a semiconductor substrate with a channel therebetween, a floating gate positioned adjacent to and spaced apart from at least a portion of said channel, wherein charges stored on said floating gate for controlling the capacitance of said channel between said first and second regions, and a control gate;
• wherein said first region is connected to said first end and said second region is connected to said second end;
• and
• a programming/erasing circuit connected to said memory cell for changing the charges stored on said floating gate thereby changing the capacitance between said first and second regions;
• wherein said first end and second end provides a desired capacitance.

A programmable resistor/capacitor comprising:

• a non-volatile floating gate memory cell having a first and a second region in a semiconductor substrate with a channel therebetween, a floating gate positioned adjacent to and spaced apart from at least a portion of said channel, wherein charges stored on said floating gate for controlling the resistance/capacitance of said channel between said first and second regions, and a control gate;
• said cell having a terminal for outputting the resistance/capacitance of said cell;
• a programming/erasing/reading controller circuit connected to said control gate, and said first and second regions of said cell for controlling the operation of said cell;
• a pre-set store for outputting a pre-set resistance/capacitance value;
• and
• a comparator for receiving as one input thereof the output from said terminal and for receiving as another input the output from said pre-set store and for comparing same;
• said comparator for activating said programming/erasing/reading controller circuit to change the amount of charges stored on said floating gate to change said resistance/capacitance of said cell in the event said output from said terminal differs from said output from said pre-set store.