Semiconductor substrate, semiconductor device, method for manufacturing semiconductor substrate and method for manucfacturing semiconductor device

A semiconductor substrate comprising:

• a semiconductor base;
• a first dielectric layer formed in a first area on the semiconductor base;
• a first single crystal semiconductor layer formed on the first dielectric layer;
• a laminated layered structure of alternately laminated layers of different selection ratios at etching, formed in a second area on the semiconductor base;
• a second dielectric layer formed on the laminated layered structure;
• and
• a second single crystal semiconductor layer formed on the second dielectric layer.

A semiconductor device comprising:

• a semiconductor substrate;
• a dielectric layer formed in a part of an area on the semiconductor substrate;
• a single crystal semiconductor layer disposed on the dielectric layer and formed by epitaxial growth;
• and
• semiconductor elements of mutually different usages formed in the semiconductor substrate and the single crystal semiconductor layer.

A semiconductor device comprising:

• a semiconductor substrate;
• a dielectric layer formed in a part of an area on the semiconductor substrate;
• single crystal semiconductor layers of mutually different film thicknesses, disposed on the dielectric layer and formed by epitaxial growth;
• and
• semiconductor elements of mutually different usages formed in the single crystal semiconductor layers.

A semiconductor device comprising:

• a semiconductor substrate;
• a dielectric layer formed in a part of an area on the semiconductor substrate;
• single crystal semiconductor layers of mutually different film thicknesses, disposed on the dielectric layer and formed by epitaxial growth;
• and
• semiconductor elements of mutually different usages formed in the semiconductor substrate and the single crystal semiconductor layers of mutually different film thicknesses.

A method for manufacturing a semiconductor substrate comprising:

• a step of forming, on a semiconductor base, a first laminated layered structure composed of a second semiconductor layer having a smaller selection ratio at etching than a first semiconductor layer, laminated on the first semiconductor layer;
• a step of forming, in a part of an area on the first laminated layered structure, a second laminated layered structure composed of a fourth semiconductor layer having a smaller selection ratio at etching than a third semiconductor layer, laminated on the third semiconductor layer;
• a step of forming a first groove that penetrates the first semiconductor layer through the fourth semiconductor layer and exposes the semiconductor base;
• a step of forming a supporting body for supporting the second and fourth semiconductor layers on the semiconductor base on side walls of the first semiconductor layer through the fourth semiconductor layer in the first groove;
• a step of forming, in a first area divided by the first groove, a second groove that exposes at least a part of the first semiconductor layer through the second semiconductor layer;
• a step of forming, in a second area divided by the first groove, a third groove that exposes at least a part of the third semiconductor layer through the fourth semiconductor layer;
• a step of forming void sections under the second and fourth semiconductor layers by selectively etching the first and third semiconductor layers through the second groove and the third groove;
• and
• a step of forming dielectric layers disposed below the second and fourth semiconductor layers by thermally oxidizing the second and fourth semiconductor layers through the void sections.

A method for manufacturing a semiconductor device comprising:

• a step of forming, on a semiconductor substrate, a first laminated layered structure composed of a second semiconductor layer having a smaller selection ratio at etching than a first semiconductor layer, laminated on the first semiconductor layer;
• a step of forming, in a part of an area on the first laminated layered structure, a second laminated layered structure composed of a fourth semiconductor layer having a smaller selection ratio at etching than a third semiconductor layer, laminated on the third semiconductor layer;
• a step of forming a first groove that penetrates the first semiconductor layer through the fourth semiconductor layer and exposes the semiconductor substrate;
• a step of forming a supporting body for supporting the second and fourth semiconductor layers on the semiconductor substrate on side walls of the first semiconductor layer through the fourth semiconductor layer in the first groove;
• a step of forming, in a first area divided by the first groove, a second groove that exposes at least a part of the first semiconductor layer through the second semiconductor layer;
• a step of forming, in a second area divided by the first groove, a third groove that exposes at least a part of the third semiconductor layer through the fourth semiconductor layer;
• a step of forming void sections under the second and fourth semiconductor layers by selectively etching the first and third semiconductor layers through the second groove and the third groove;
• a step of forming dielectric layers disposed below the second and fourth semiconductor layers by thermally oxidizing the second and fourth semiconductor layers through the void sections;
• and
• a step of forming semiconductor elements of different usages under the second and fourth semiconductor layers, respectively.