Semiconductor device and method of manufacturing the same
AssigneeSanyo Electric Co., Ltd.
InventorsYasuyuki Sayama, Tetsuya Okada, Makoto Oikawa, Hiroyasu Ishida, Kazunari Kushiyama
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AssigneeSanyo Electric Co., Ltd.
InventorsYasuyuki Sayama, Tetsuya Okada, Makoto Oikawa, Hiroyasu Ishida, Kazunari Kushiyama
Estimating the term…
An n type impurity region is provided below a gate electrode. By setting a gate length to be less than a depth of a channel region, a side surface of the channel region and a side surface of the n type impurity region adjacent to the channel region form a substantially perpendicular junction surface. Thus, since a depletion layer widens uniformly in a depth direction of a substrate, it is possible to secure a predetermined breakdown voltage. Furthermore, since an interval between the channel regions, above which the gate electrode is disposed, is uniform from its surface to its bottom, it is possible to increase an impurity concentration of the n type impurity region, resulting in an achievement of a low on-resistance.
A semiconductor device comprising:
A method of manufacturing a semiconductor device, comprising:
A method of manufacturing a semiconductor device, comprising:
A semiconductor device comprising:
A semiconductor device comprising:
Dependencies are inferred from the claim text.