Semiconductor device and manufacturing method thereof
AssigneeFujitsu Limited
InventorsToshihiko Miyashita, Kunihiro Suzuki
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Abstract
An ideal step-profile in a channel region is realized easily and reliably, whereby suppression of the short-channel effect and prevention of mobility degradation are achieved together. A silicon substrate is amorphized to a predetermined depth from a semiconductor film, and impurities to become the source/drain are introduced in this state. Then the impurities are activated, and the amorphized portion is recrystallized, by low temperature solid-phase epitaxial regrowth. With the processing temperature required for the low temperature solid-phase epitaxial regrowth being within a range of 450° C.-650° C., thermal diffusion of the impurities into the semiconductor film is suppressed, thereby maintaining the initial steep step-profile.
Claims13
A manufacturing method of a semiconductor device comprising the processes of:
- introducing the first impurities of the first conductivity type into the semiconductor region of a semiconductor substrate, and activating said first impurity;
- forming a thin semiconductor film on said semiconductor region;
- amorphizing said semiconductor region to a predetermined depth from said semiconductor film;
- patterning a gate electrode on said amorphized semiconductor film through a gate insulator;
- introducing the second impurities of the second conductivity type into the semiconductor region from said semiconductor film at both sides of said gate electrode, and forming a source region and a drain region;
- activating said second impurity introduced, and recrystallizing the amorphized portion of said semiconductor film and said semiconductor region, by performing heat treatment.
A semiconductor device comprising:
- a semiconductor substrate having an active region defined thereon and having the first impurities of the first conductivity type introduced into said active region;
- a source region and a drain region formed by introducing the second impurities of the second conductivity type into said active region;
- and
- a gate electrode patterned, through a gate insulator, on a channel region between said source region and said drain region of said active region, wherein
- said active region has a residual defect plane formed on a portion which is deeper than the depth of the interface of said source region and said drain region with said semiconductor substrate, a region from the surface to said residual defect plane being recrystallized from the amorphous condition, and
- said channel region, with its surface layer substantially not containing impurities, is formed so that the concentration of said first impurity increases in a steep, step-wise manner at the interface between said surface layer.
Dependencies are inferred from the claim text.