MOSFET with a second poly and an inter-poly dielectric layer over gate for synchronous rectification
AssigneeAlpha and Omega Semiconductor Incorporated
InventorsSik Lui, Anup Bhalla
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Abstract
This invention discloses a new trenched vertical semiconductor power device that includes a capacitor formed between a conductive layer covering over an inter-dielectric layer disposed on top of a trenched gate. In a specific embodiment, the trenched vertical semiconductor power device may be a trenched metal oxide semiconductor field effect transistor (MOSFET) power device. The trenched gate is a trenched polysilicon gate and the conductive layer is a second polysilicon layer covering an inter-poly dielectric layer disposed on top of the trenched polysilicon gate. The conductive layer is further connected to a source of the vertical power device.
Claims31
A trenched vertical semiconductor power device comprising:
- a capacitor formed between a conductive layer covering over an inter-dielectric layer disposed on top of a trenched gate.
A buck converter comprising:
- a high-side MOSFET device having a first high-side source connected to a low-side drain of a low-side MOSFET device;
- and
- a capacitor formed between a conductive layer covering over an inter-dielectric layer disposed on top of a trenched gate of said low-side MOSFET device for increasing a gate-source capacitance Cgs for drawing a large current to the ground thus preventing a shoot through.
A method for fabricating a trenched vertical semiconductor power device comprising:
- forming a capacitor between a conductive layer covering over an inter-dielectric layer disposed on top of a trenched gate.
A method for adjusting a gate-source capacitance (Cgs) of a trenched MOSFET device comprising:
- disposing a capacitor on top of a trenched gate by forming a conductive layer covering over an inter-dielectric layer deposited on top of said trenched gate of said MOSFET device.
Dependencies are inferred from the claim text.