Non-volatile memory cell and method of fabrication

Semiconductor device comprising

• a vertical split gate non-volatile memory cell, for storing at least one bit, on a semiconductor substrate, comprising on said substrate
• a trench,
• a first active area,
• a second active area,
• a channel region extending substantially along a side wall of said trench,
• said trench having a length in a first direction and a width in a second direction, said first direction being perpendicular to said second direction,
• said trench being covered on said side walls by a tunnel oxide and comprising at least one gate stack,
• said gate stack consisting of a floating gate and a control gate,
• said floating gate being separated from said control gate by a dielectric, characterised in that said control gate extends to the bottom part of said trench,
• a first floating gate is located at a left side wall of said trench to form a first gate stack with said control gate, and a second floating gate is located at a right side wall of said trench to form a second gate stack with said control gate.