Virtual machine for timing-critical tasks on microprocessors
AssigneeTexas Instruments Incorporated
InventorPing Tao
Life of this patent
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Abstract
The present invention provides a virtual machine for use with a general purpose processor (GPP). In one embodiment, the virtual machine includes a register set of the GPP dedicated to retain an execution context corresponding to an interrupt-driven task. The virtual machine also includes an interrupt generator coupled to the register set and configured to provide at least one interrupt event associated with the interrupt-driven task. The virtual machine further includes a virtual processor coupled to the interrupt generator and configured to execute a processing state corresponding to each interrupt event.
Claims21
A virtual machine for use with a general purpose processor (GPP), comprising:
- a register set of said GPP dedicated to retain an execution context corresponding to an interrupt-driven task;
- an interrupt generator coupled to said register set and configured to provide at least one interrupt event associated with said interrupt-driven task;
- and
- a virtual processor coupled to said interrupt generator and configured to execute a processing state corresponding to each interrupt event.
A method of providing a virtual machine for use with a general purpose processor (GPP), comprising:
- retaining an execution context corresponding to an interrupt-driven task employing a dedicated register set of said GPP;
- providing at least one interrupt event associated with said interrupt-driven task employing an interrupt generator;
- and
- executing a processing state corresponding to each interrupt event employing a virtual processor.
A general purpose processor (GPP), comprising:
- a hardware portion;
- a hardware abstraction layer coupled to said hardware portion;
- a real time operating system (RTOS) coupled to said hardware abstraction layer;
- an application software layer coupled to said RTOS;
- and
- a virtual machine coupled to said hardware abstraction layer, including:
- a register set of said hardware portion dedicated to retain an execution context corresponding to an interrupt-driven task,
- an interrupt generator, coupled to said register set, that provides at least one interrupt event associated with said interrupt-driven task;
- and
- a virtual processor, coupled to said interrupt generator, that executes a processing state corresponding to each interrupt event.
Dependencies are inferred from the claim text.