Power supply analysis method and program product for executing the same
AssigneeNEC Electronics Corporation
InventorHiroyuki Uchida
Life of this patent
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Abstract
A method of power supply analysis includes the steps of dividing a package substrate to which a semiconductor device is mounted into a plurality of first area, specifying virtual flat plate conductors to correspond to the plurality of the first areas, calculating a plurality of electrical properties including inductance characteristics of the flat plate conductors, and correcting the inductance characteristics based on the number of via holes in each of the first areas.
Claims12
A method of power supply analysis comprising:
- dividing a package substrate to which a semiconductor device is mounted into a plurality of first areas;
- specifying virtual flat plate conductors to correspond to the plurality of first areas;
- calculating a plurality of electrical properties including inductance characteristics of the flat plate conductors;
- and
- correcting the inductance characteristics based on the number of via holes in each of the first areas.
A program product to cause a computer to execute the process of power supply analysis for a semiconductor apparatus, the process comprising:
- dividing a package substrate to which a semiconductor device is mounted into a plurality of first areas;
- specifying virtual flat plate conductors to correspond to the plurality of first areas;
- calculating a plurality of electrical properties including inductance characteristics of the flat plate conductors;
- and
- correcting the inductance characteristics based on the number of via holes in each of the first areas.
Dependencies are inferred from the claim text.