Low power cost-effective ECC memory system and method
AssigneeMicron Technology, Inc.
InventorDean Klein
Life of this patent
Estimating the term…
Abstract
A memory controller couples 32-bit data words to and from a DRAM. The DRAM generates error checking and correcting syndromes to check and correct read data. The DRAM generates the syndromes from respective 128-bit data words each formed by 4 32-bit data words written to the DRAM, and thereby achieves a low syndrome bit overhead. The memory controller may write data words to the DRAM having less than 128 bits by first reading 4 32-bit words from the DRAM, substituting the write data for a corresponding number of bits of read data, and writing the new 128-bit word to the DRAM by writing 4 32-bit words.
Claims2
A method of reading data from and writing data to a memory device having an array of memory cells, comprising:
- coupling a memory write command to the memory device;
- coupling at least one M-bit word of write data to the memory device, where M is a positive integer;
- within the memory device, using N of the M-bit words to generate an error checking and correcting syndrome, where N is a positive integer greater than one;
- coupling at least a portion of the N M-bit words to the array of memory cells;
- storing the generated syndrome in the memory device;
- coupling a memory read command to the memory device;
- in response to the read command, coupling N M-bit words from the array of memory cells;
- within the memory device, using a syndrome corresponding to the N M-bit words coupled from the array of memory cells to determine if any of the bits of the N M-bit words coupled from the array of memory cells is in error;
- if any of the bits of the N M-bit words are determined to be in error, using the syndrome to correct each erroneous bit and provide corrected N M-bit words, and coupling at least one of the corrected N M-bit words from the memory device;
- and
- if any of the bits of the N M-bit words are not determined to be in error, coupling at least one of the N M-bit words coupled from the array of memory cells from the memory device.
2-63. (canceled)
Dependencies are inferred from the claim text.