System and method for testing a memory for a memory failure exhibited by a failing memory
AssigneeMicron Technology, Inc.
InventorsValerie Crump, Brad Roosendaal
Life of this patent
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Abstract
A system and method for testing a memory under test on automated test equipment (ATE) that includes capturing operating conditions for a memory exhibiting a memory failure in a sequence of records corresponding the operating conditions over a period of time that includes the occurrence of the memory failure and further includes executing a software translation module to generate a file of test vectors from the sequence of records that when executed by the ATE reproduce the operating condition over the sampled period of time. The memory under test is tested according to the file of test vectors for the ATE.
Claims2
A method for testing a memory on automated test equipment (ATE) having a test vector memory, the method comprising:
- sampling operating conditions for a memory exhibiting a memory failure, the sampling occurring over a period of time that includes the occurrence of the memory failure;
- creating a sequence of records representing the sampled operating conditions over the period of time;
- translating the sequence of records into a file of test vectors for execution by the ATE to simulate the sampled operating conditions under which the memory failure occurred;
- loading the file of test vectors into the test vector memory;
- and
- executing the file of test vectors on the ATE to test the memory according to the test vectors.
2-26. (canceled)
Dependencies are inferred from the claim text.