Integrated circuit device

An integrated circuit device having a CPU which performs given processing based on an instruction code,

• the CPU including:
• an ALU which performs calculation processing based on the instruction code;
• an ALU output supply line used to supply a calculation result of the ALU to a coprocessor;
• and
• a flag data supply line used to supply an output from a flag register which stores flag data based on the calculation result of the ALU to the coprocessor;
• the calculation result of the ALU being output to the ALU output supply line;
• and
• the flag data stored in the flag register being output to the flag data supply line.

An integrated circuit device having a CPU which performs given processing based on an instruction code,

• the CPU including:
• an immediate value generation section which generates immediate data based on the instruction code and outputs the generated immediate data;
• a lord store section which reads data from a memory or writes data into the memory;
• an immediate data supply line used to supply the output from the immediate value generation section to a coprocessor;
• and
• a load data supply line used to supply data read from the memory by the lord store section to the coprocessor;
• the immediate value generation section outputting the immediate data to the immediate data supply line;
• and
• the lord store section outputting the data read from the memory to the load data supply line.

An integrated circuit device having a CPU which performs given processing based on an instruction code,

• the CPU including:
• a fetch section which fetches the instruction code;
• a register file including a plurality of registers and first to nth (n is an integer greater than one) register select circuits each of which selects at least one arbitrary register from the plurality of registers and outputs a value stored in the selected register;
• an instruction code supply line used to supply the instruction code fetched by the fetch section to a coprocessor;
• and
• first to nth register file supply lines used to supply the output from at least one of the first to nth register select circuits of the register file to the coprocessor;
• each of the registers storing an address or data used for the given processing;
• the fetch section outputting the fetched instruction code to the instruction code supply line;
• and
• the outputs from the first to nth register select circuits of the register file being output to the first to nth register file supply lines.

An integrated circuit device having a CPU which performs given processing based on an instruction code,

• the CPU including:
• a register file including a plurality of registers;
• and
• a fixed register data supply line used to supply an output from a register of the plurality of registers set as a fixed register to a coprocessor;
• and
• the fixed register storing an address or data used for the given processing;
• and
• a value stored in the fixed register being output to the fixed register data supply line.

An integrated circuit device having a CPU which performs given processing based on an instruction code,

• the CPU including:
• an immediate value generation section which generates immediate data based on the instruction code and outputs the generated immediate data;
• and
• an immediate data supply line used to supply the output from the immediate value generation section to a coprocessor;
• and
• the immediate value generation section outputting the immediate data to the immediate data supply line.

An integrated circuit device having a CPU which performs given processing based on an instruction code,

• the CPU including:
• an ALU which performs calculation processing based on the instruction code and outputs a calculation result;
• and
• an ALU output supply line used to supply the calculation result of the ALU to a coprocessor;
• and
• the calculation result of the ALU being output to the ALU output supply line.

An integrated circuit device having a CPU which performs given processing based on an instruction code,

• the CPU including an ALU which performs calculation processing based on the instruction code;
• the ALU including a flag register which stores flag data based on a calculation result;
• the CPU including a flag data supply line used to supply an output from the flag register of the ALU to a coprocessor;
• and
• the flag data stored in the flag register being output to the flag data supply line.

An integrated circuit device having a CPU which performs given processing based on an instruction code,

• the CPU including:
• a lord store section which reads data from a memory or writes data into the memory;
• and
• a load data supply line used to supply data read from the memory by the lord store section to a coprocessor;
• and
• the data read from the memory by the lord store section being output to the load data supply line.

An integrated circuit device having a CPU which performs given processing based on an instruction code,

• the CPU including:
• a fetch section which fetches the instruction code;
• a decode control section which decodes the instruction code fetched by the fetch section and outputs a control signal;
• and
• a control signal supply line used to supply the control signal output from the decode control section to a coprocessor;
• and
• the control signal output from the decode control section being output to the control signal supply line.

An integrated circuit device having a CPU which performs given processing based on an instruction code,

• the CPU including:
• a fetch section including a program counter;
• and
• a count value supply line used to supply a count value output from the program counter to a coprocessor;
• the fetch section fetching the instruction code based on the count value output from the program counter;
• and
• the count value of the program counter being output to the count value supply line.

An integrated circuit device having a CPU which performs given processing based on an instruction code, and a coprocessor which performs given calculation processing based on data supplied from the CPU and outputs a calculation result to the CPU,

• the CPU including:
• a register file including a plurality of registers, each of which holds an address or data used for the given processing, and first to nth (n is an integer greater than one) register select circuits, each of which selects at least one arbitrary register from the plurality of registers and outputs a value stored in the selected register;
• and
• first to nth register file supply lines used to supply an output from at least one of the first to nth register select circuits of the register file to the coprocessor.

An integrated circuit device having a CPU which performs given processing based on an instruction code, and a coprocessor which performs given calculation processing based on data supplied from the CPU and outputs a calculation result to the CPU,

• the CPU including:
• an immediate value generation section which generates immediate data based on the instruction code and outputs the generated immediate data;
• and
• an immediate data supply line used to supply the immediate data output from the immediate value generation section to the coprocessor.

An integrated circuit device having a CPU which performs given processing based on an instruction code, and a coprocessor which performs given calculation processing based on data supplied from the CPU and outputs a calculation result to the CPU,

• the CPU including:
• an ALU which performs calculation processing based on the instruction code;
• and
• an ALU output supply line used to supply a calculation result of the ALU to a coprocessor.

An integrated circuit device having a CPU which performs given processing based on an instruction code, and a coprocessor which performs given calculation processing based on data supplied from the CPU and outputs a calculation result to the CPU,

• the CPU including:
• a lord store section which reads data from a memory or writes data into the memory;
• and
• a load data supply line used to supply data read from the memory by the lord store section to the coprocessor.

An integrated circuit device having a CPU which performs given processing based on an instruction code,

• the CPU including:
• a fetch section which fetches the instruction code;
• a register file including a plurality of registers and first to nth (n is an integer greater than one) register select circuits each of which selects at least one arbitrary register from the registers and outputs a value stored in the selected register, each of the registers storing an address or data used for the given processing;
• an immediate value generation section which generates immediate data based on the instruction code and outputs the generated immediate data;
• an instruction code supply line used to supply the instruction code fetched by the fetch section to a coprocessor, the instruction code fetched by the fetch section being output to the instruction code supply line;
• first to nth register file supply lines used to supply the output from at least one of the first to nth register select circuits of the register file to the coprocessor, the outputs from the first to nth register select circuits of the register file being output to the first to nth register file supply lines;
• and
• an immediate data supply line used to supply the output from the immediate value generation section to the coprocessor, the immediate data generated by the immediate value generation section being output to the immediate data supply line.