Processor and method of indirect register read and write operations

A method comprising:

• reading a value from a source field of a program instruction;
• accessing a first register based on the source field value and obtaining a first register-out value;
• optionally performing a first mathematical/logical operation on the first register-out value;
• accessing a second register based on a result from the first mathematical/logical operation and obtaining a second register-out value;
• optionally performing a second mathematical/logical operation on the second register-out value;
• reading a value from a destination field of the program instruction;
• and
• storing a result from the second mathematical/logical operation into a third register based on the destination field value.

A computer-readable medium having encoded thereon a process for execution in a digital signal processor, the process comprising:

• accessing a first register based on a program instruction and obtaining a first register-out value;
• accessing a second register based on the first register-out value and obtaining a second register-out value;
• and
• storing the second register-out value into a third register based on the program instruction.

A processor, comprising:

• means for accessing a first register based on a program instruction and obtaining a first register-out value;
• means for accessing a second register based on the first register-out value and obtaining a second register-out value;
• and
• means for storing the second register-out value into a third register based on the program instruction.

A method comprising:

• accessing a first register based on a program instruction and obtaining a first register-out value;
• accessing a second register based on the program instruction and obtaining a second register-out value;
• and
• storing the first register-out value into a third register based on the second register-out value.

A computer-readable medium having encoded thereon a method comprising:

• accessing a first register based on a program instruction and obtaining a first register-out value;
• accessing a second register based on the program instruction and obtaining a second register-out value;
• and
• storing the first register-out value into a third register based on the second register-out value.

A processor comprising:

• means for accessing a first register based on a program instruction and obtaining a first register-out value;
• means for accessing a second register based on the program instruction and obtaining a second register-out value;
• and
• means for storing the first register-out value into a third register based on the second register-out value.