Multi-process support with data atomicity guaranteed with shared register of data of control signals
AssigneeHewlett-Packard Development Company, L.P.
InventorsRichard Brabant, Craig VanZante
Life of this patent
Estimating the term…
Loading patent…
AssigneeHewlett-Packard Development Company, L.P.
InventorsRichard Brabant, Craig VanZante
Estimating the term…
A method of, shared register system and system for controlling access to a register are described. The shared register stores a plurality of bits including control and data bits. An access signal and a combined signal including a control portion and a data portion are received and the data portion of the combined signal is written to one or more data bits of the shared register corresponding to the control portion of the combined signal. A shared register system for controlling access to portions of a shared register includes a register having storage for bits and a register access control configured to receive an access signal and a combined signal. The register access control is operatively connected with the register to control write access to the register based on the access signal and the control portion of the combined signal.
A method of controlling write access to portions of a shared register, wherein the shared register stores a plurality of bits including one or more control bits and one or more data bits, comprising the steps of:
A shared register system, comprising:
A system for controlling access to a register, comprising:
Dependencies are inferred from the claim text.