Look ahead LRU array update scheme to minimize clobber in sequentially accessed memory
AssigneeIntel Corporation
InventorsPeter Smith, Satish Damaraju, Subramaniam Maiyuran
Life of this patent
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AssigneeIntel Corporation
InventorsPeter Smith, Satish Damaraju, Subramaniam Maiyuran
Estimating the term…
A high-speed memory management technique that minimizes clobber in sequentially accessed memory, including but not limited to, for example, a trace cache. The method includes selecting a victim set from a sequentially accessed memory; selecting a victim way for the selected victim set; reading a next way pointer from a trace line of a trace currently stored in the selected victim way, if the selected victim way has the next way pointer; and writing a next line of the new trace into the selected victim way over the trace line of the currently stored trace. The method also includes forcing a replacement algorithm of next set to select a victim way of the next set using the next way pointer, if the trace line of the currently stored trace is not an active trace tail line.
A method comprising:
A machine-readable medium having stored thereon a plurality of executable instructions to perform a method comprising:
A method comprising:
A machine-readable medium having stored thereon a plurality of executable instructions to perform a method comprising:
A processor comprising:
A computer system comprising:
Dependencies are inferred from the claim text.