Method for reducing dielectric overetch when making contact to conductive features

A method for reducing dielectric overetch, the method comprising:

• forming a layer of a first dielectric material;
• forming conductive or semiconductor features above and in contact with the first dielectric material;
• depositing a second dielectric material above and contacting the conductive or semiconductor features;
• etching a void in the second dielectric material, wherein the etch is selective between the first and second dielectric material, and the etch stops on the first dielectric material;
• and
• exposing a portion of the conductive or semiconductor features.

A method for reducing dielectric overetch, the method comprising:

• depositing a layer or stack of conductive or semiconductor material;
• patterning and etching the layer or stack of conductive or semiconductor material to form conductive or semiconductor features;
• depositing first dielectric fill over and between the conductive or semiconductor features;
• planarizing to coexpose the first dielectric fill and the conductive or semiconductor features, forming a substantially planar surface;
• depositing a dielectric etch stop layer directly on the planar surface;
• depositing second dielectric material on the dielectric etch stop layer;
• etching a void in the second dielectric material, wherein the etch is selective between the second dielectric material and the dielectric etch stop layer, wherein the etch stops on the dielectric etch stop layer;
• and
• etching a portion of the dielectric etch stop layer to expose portions of the conductive or semiconductor features.

A method for reducing dielectric overetch, the method comprising:

• depositing a layer or stack of conductive or semiconductor material above a substrate;
• patterning and etching the conductive or semiconductor material to form a plurality of conductive or semiconductor features separated by gaps;
• filling the gaps with a first dielectric fill;
• depositing a second dielectric material directly on the first dielectric fill;
• depositing a third dielectric material above the conductive or semiconductor features;
• etching a void in the third dielectric material, wherein the etch is selective between the third dielectric material and the second dielectric material and the etch stops on the second dielectric material;
• and
• exposing a portion of the conductive or semiconductor feature.

A method for forming a via connecting device levels in a monolithic three dimensional array, the method comprising:

• forming first conductive features in a first device level above a substrate;
• forming a first dielectric etch stop layer in contact with the first conductive features;
• depositing a second dielectric material above the first conductive features;
• etching a void in the second dielectric material, wherein the etch is selective between the first dielectric material and the second dielectric material, wherein the etch stops on the first dielectric material;
• exposing a portion of the first conductive features;
• forming the via within the void, the via making electrical connection to one of the first conductive features;
• and
• monolithically forming at least a second device level above the first device level.

A method for forming a via connecting device levels in a monolithic three dimensional array, the method comprising:

• forming first conductive features at a first height above a substrate;
• forming a first dielectric etch stop layer in contact with the first conductive features;
• depositing a second dielectric material above the first conductive features;
• etching a void in the second dielectric material, wherein the etch is selective between the first dielectric material and the second dielectric material, wherein the etch stops on the first dielectric material;
• exposing a portion of the first conductive features;
• forming the via within the void, the via making electrical connection to one of the first conductive features;
• monolithically forming a first device level at a second height above the first height;
• and
• monolithically forming a second device level above the first device level.