Method for controlling spacer oxide loss

A method of forming spacers on the sides of a gate structure, on a semiconductor substrate, comprising:

• forming a gate structure overlying a gate insulator layer on the substrate;
• forming a liner layer over the exposed surfaces of the semiconductor substrate, the gate insulator layer, and the gate structure;
• forming a layer of gate spacer material over the liner layer;
• forming gate spacers from the layer of gate spacer material;
• forming a protection layer over portions of the liner layer, gate structure, and the gate spacers;
• performing a descum procedure to expose a top part of the liner layer, gate structure, and the gate spacers;
• performing a first wet etch procedure to remove exposed portions of the liner layer;
• removing the protection layer;
• and
• performing a second wet etch procedure to remove substantially a top portion and a bottom portion of the liner layer.

A semiconductor structure, comprising:

• a gate structure formed overlying a gate insulator layer on a semiconductor substrate;
• gate spacers formed adjacent the gate structure;
• and
• a first liner layer formed in the interface between the gate spacers and the gate structure defining a top portion of the liner layer, and a second liner layer formed in the interface between the gate spacers and the substrate defining a bottom portion of the liner layer, wherein a loss of the top portion compared to the bottom portion has a thickness of more than and equal to about 50 Angstroms.